End-to-End HW/SW Integration Engineer (Compute)

Teradyne; Reading, Northern (MA, KY); Hybrid; USD 141,000 - 226,000; Full time

Benefits offered by this job

Health and well-being benefits

Tuition assistance

Paid vacation & holidays

Job summary

Teradyne is seeking a Hardware/Software Integration Engineer (Compute Test) in North Reading, MA. You will bridge firmware, application software, and hardware layers to trace defects end to end, review HDL/schematics, and drive robust debug tooling across multiple teams.

The role requires 6+ years of cross-disciplinary engineering, strong C/C++, Python proficiency, and experience with SPI/I2C/UART, FPGA and DAC/ADC behavior. Local candidates only.

Qualifications

• BS or MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent
• 6+ years of engineering experience including firmware and application software on at least one shipped product
• Strong C/C++ in embedded or Linux environments and Python for automation
• Experience solving cross-layer system problems and debugging across hardware and software

Responsibilities

• Trace and root-cause defects end to end across the instrument stack, from host app to DAC/ADC behavior
• Own the correctness of translation layers, including APIs and register maps
• Review code, HDL and schematics beyond own deliverables
• De-risk new board revisions before hardware arrives
• Build and improve debug tooling, instrumentation and AI-assisted debug/log review
• Mentor engineers and expand cross-disciplinary debugging capabilities

Skills

C/C++

Embedded Linux

Python

Debugging across hardware/software

SPI/I2C/UART

FPGA/ HDL reading

Schematic reading

Cross-team collaboration

Education

BS or MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent

Tools

BSPs

Oscilloscope

Schematic capture tools

Job description

Teradyne is seeking a Hardware/Software Integration Engineer (Compute Test) in North Reading, MA. You will bridge firmware, application software, and hardware layers to trace defects end to end, review HDL/schematics, and drive robust debug tooling across multiple teams.

The role requires 6+ years of cross-disciplinary engineering, strong C/C++, Python proficiency, and experience with SPI/I2C/UART, FPGA and DAC/ADC behavior. Local candidates only.