CPU Design Timing Engineer: Drive High-Performance Timing Closure

Apple, Inc.; Austin (TX); Presencial; USD 150 000 - 230 000; Tempo integral

Resumo da oferta

Apple, Inc. is seeking a CPU Design Timing Engineer in Austin to lead timing closure across CPU projects. You will collaborate with CAD, RTL and implementation teams to craft timing flows and automate analyses using TCL, Perl or Python. Experience with high-performance CPU timing, cross-domain design, and physical design tools is preferred.

The role emphasizes hands-on timing work, tool flows, and the ability to optimize for 1 GHz+ designs in a fast-paced hardware environment.

Qualificações

• Experience with script writing in TCL, Perl or Python.
• Strong timing analysis background and hardware design flow understanding.
• Familiarity with physically aware synthesis and timing closure concepts.

Responsabilidades

• Own timing closure for CPU design and collaborate with RTL/implementation teams.
• Develop timing flows and scripting to improve analysis efficiency.
• Drive timing closure across multiple clock and power domains for 1 GHz+ designs.

Conhecimentos

TCL scripting

Python scripting

Perl scripting

Ferramentas

Primetime

Tempus

Place & Route tools

Descrição da oferta de emprego

Apple, Inc. is seeking a CPU Design Timing Engineer in Austin to lead timing closure across CPU projects. You will collaborate with CAD, RTL and implementation teams to craft timing flows and automate analyses using TCL, Perl or Python. Experience with high-performance CPU timing, cross-domain design, and physical design tools is preferred.

The role emphasizes hands-on timing work, tool flows, and the ability to optimize for 1 GHz+ designs in a fast-paced hardware environment.