Contract ASIC/FPGA Verification Engineer – UVM/SystemVerilog

Boeing Future of Flight; Mountain View (CA); On-site; USD 103,320 - 110,208; Part time

Benefits offered by this job

Medical

Dental

Vision

401K

Job summary

A leading aerospace company is seeking an Electrical Design and Analyst Engineer to work in Mountain View, CA. This contract role focuses on ASIC/FPGA verification, requiring expertise in SystemVerilog and a Bachelor's degree in a relevant field. You will be responsible for writing test benches and collaborating with hardware teams. The position offers competitive pay rates of $75 to $80 per hour and optional benefits such as medical and dental coverage.

Qualifications

• Bachelor’s degree in EE, CE, CS, or related field (or equivalent experience).
• Experience with ASIC/FPGA verification using SystemVerilog and UVM.
• Comfortable in Linux and using scripting tools.

Responsibilities

• Write SystemVerilog/UVM test benches to verify ASICs and FPGAs.
• Develop self-checking, reusable UVM components: drivers, monitors, scoreboards, sequencers.
• Collaborate with system and hardware teams to capture requirements and debug issues.

Skills

ASIC/FPGA verification using SystemVerilog and UVM

Building self-checking test benches

Scripting tools (Python/Perl/Make)

Linux operating system

Education

Bachelor’s degree in EE, CE, CS, or related field

Job description

A leading aerospace company is seeking an Electrical Design and Analyst Engineer to work in Mountain View, CA. This contract role focuses on ASIC/FPGA verification, requiring expertise in SystemVerilog and a Bachelor's degree in a relevant field. You will be responsible for writing test benches and collaborating with hardware teams. The position offers competitive pay rates of $75 to $80 per hour and optional benefits such as medical and dental coverage.