Cache Coherence Architect — NOC IP Lead (Senior)

MIPS Holding Inc

Santa Clara (CA)

On-site

USD 167,000 - 290,000

Full time

14 days+
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Benefits offered by this job

Competitive compensation
Comprehensive benefits package
Career growth opportunities

Job summary

GlobalFoundries, a leader in semiconductor manufacturing, seeks a NOC and Cache Coherency Architect with 15+ years of expertise to drive design and verification of Coherency Manager and Cache Controller IP. Collaboration with CPU core teams will be essential to ensure high-performance processor designs.

The role requires deep experience in SystemVerilog, Verilog, C/C++, and Assembly, plus strong scripting skills.

Qualifications

  • Master’s degree or higher in Electronics/Electrical/Computer Engineering.
  • 15+ years of verification experience in CPU or complex SoC.
  • Proven expertise in multicore/multicluster coherency and cache controllers.
  • Proficiency in SystemVerilog, Verilog, C/C++, and Assembly.
  • Strong knowledge of AXI/ACE/OCP/CHI interconnects.
  • Strong scripting in Python/Perl/TCL/Shell.
  • Experience with CPU architectures (RISC-V, ARM, or MIPS).

Responsibilities

  • Lead architectural specification and design for Coherency Manager and Cache Controller IP.
  • Collaborate with design teams and architects on microarchitectural specs.
  • Automate and optimize verification flows and regression environments.
  • Mentor design engineers within the verification team.

Skills

NOC architecture
Coherency Manager
Cache Controller IP
SystemVerilog
Verilog
C/C++
Assembly
AXI/ACE/OCP/CHI
Python
Perl
TCL/Shell
MIPS/RISC-V/ARM

Education

Master’s degree in Electronics/Electrical/Computer Engineering

Job description

GlobalFoundries, a leader in semiconductor manufacturing, seeks a NOC and Cache Coherency Architect with 15+ years of expertise to drive design and verification of Coherency Manager and Cache Controller IP. Collaboration with CPU core teams will be essential to ensure high-performance processor designs.

The role requires deep experience in SystemVerilog, Verilog, C/C++, and Assembly, plus strong scripting skills.

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