ASIC Verification & Hardware Design Intern

HPE Aruba Networking

Roseville (CA)

Hybrid

USD 48,000 - 56,000

Full time

14 days+

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Job summary

HPE Aruba Networking in Roseville, CA is offering an ASIC Post-Si Verification Engineering Intern position. You will join the ASIC development team on next generation products, contributing to RTL/Physical Design and verification tasks with senior engineers.

The internship includes a summer project aligned with current and future ASIC efforts. The program targets students pursuing a bachelor's or master's in a technical field, typically completing at least the third year of study.

Qualifications

  • Pursuing a Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering or a related technical field.
  • At least 3rd Year of engineering courses completed.
  • Basic programming or scripting knowledge (Verilog, SystemVerilog, Python, PERL, TCL, C, C++).
  • Experience with hardware design.
  • Strong interest in high-tech and a passion for learning.
  • Excellent communication and interpersonal skills.
  • Ability to work within a team environment.

Responsibilities

  • The intern will be working with the HPE Aruba ASIC development team on next generation products.
  • You will have a summer project that will be used for/in the development activities of current or future ASICs.
  • Responsibilities may include RTL/Physical Design, Pre-Silicon verification; Post-Silicon verification; Formal Verification; Script & Tool development; schedule breakdowns, document generation, and several other possible duties.

Skills

Communication skills
Interpersonal skills
Teamwork
Problem solving
Willingness to learn

Education

Bachelors/Masters in CE/CS/EE
3rd-year engineering coursework

Tools

Verilog
SystemVerilog
Python
Perl
TCL
C
C++

Job description

HPE Aruba Networking in Roseville, CA is offering an ASIC Post-Si Verification Engineering Intern position. You will join the ASIC development team on next generation products, contributing to RTL/Physical Design and verification tasks with senior engineers.

The internship includes a summer project aligned with current and future ASIC efforts. The program targets students pursuing a bachelor's or master's in a technical field, typically completing at least the third year of study.

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