ASIC Verification Engineering Intern

Centro Escolar University; Roseville (CA); On-site; USD 48,000 - 56,000; Full time

Benefits offered by this job

Competitive hourly pay

Learning & development programs

Comprehensive benefits

Job summary

Centro Escolar University in California invites motivated students to join our ASIC/VLSI internship, focusing on next-generation ASIC development and verification tasks. You will engage with RTL/Physical Design, pre/post-silicon verification, and tool scripting while contributing to ongoing projects.

The role emphasizes collaboration, learning from senior engineers, and a strong interest in high- tech hardware development.

Qualifications

• Currently pursuing a Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field.
• Completed at least the 3rd year of engineering courses.
• Basic programming or scripting knowledge such as Verilog, SystemVerilog, Python, PERL, TCL, C, or C++.
• Experience with hardware design.
• Strong interest in high-tech and passion for learning.
• Excellent communication and interpersonal skills.
• Strong problem-solving and analytical abilities.
• Ability to work effectively within a team environment.

Responsibilities

• Work with the HPE Aruba ASIC development team on next-generation products.
• Complete a summer project contributing to current or future ASIC development activities.
• Engage in RTL/Physical Design, Pre-Silicon and Post-Silicon verification, Formal Verification, and script/tool development.
• Perform schedule breakdowns, document generation, and other duties as assigned based on skills and business needs.
• Collaborate and learn from senior members of the ASIC/VLSI team.

Skills

Team collaboration

Communication

Problem solving

Analytical thinking

Education

Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field

Tools

Verilog

SystemVerilog

Python

PERL

TCL

C

C++

Hardware design

Job description

Your Role

Here’s what you will be doing:

• Work with the HPE Aruba ASIC development team on next-generation products.
• Complete a summer project contributing to current or future ASIC development activities.
• Engage in RTL/Physical Design, Pre-Silicon and Post-Silicon verification, Formal Verification, and script/tool development.
• Perform schedule breakdowns, document generation, and other duties as assigned based on skills and business needs.
• Collaborate and learn from senior members of the ASIC/VLSI team.

About You

The company is looking for candidates with the following qualifications and skills:

• Currently pursuing a Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field.
• Completed at least the 3rd year of engineering courses.
• Basic programming or scripting knowledge such as Verilog, SystemVerilog, Python, PERL, TCL, C, or C++.
• Experience with hardware design.
• Strong interest in high-tech and passion for learning.
• Excellent communication and interpersonal skills.
• Strong problem-solving and analytical abilities.
• Ability to work effectively within a team environment.

Compensation & Benefits

• Hourly salary range of USD 35.00 - 41.00 in California, with actual offer varying based on location, experience, education, and skill level.
• Variable incentives may also be offered.
• Comprehensive benefits supporting physical, financial, and emotional wellbeing.

Training & Development

HPE invests in career growth through specific programs to help employees reach their career goals, whether becoming experts in their field or applying skills to other divisions.

Career Progression

The internship provides opportunities to contribute to state-of-the-art networking chip development, gaining experience that supports future career advancement in ASIC and VLSI engineering.