ASIC RTL Design Engineer — Hexagon/NPU SoC

Qualcomm; San Diego (CA); On-site; USD 127,200 - 190,800; Full time

Benefits offered by this job

Competitive salary

Bonus opportunities

Comprehensive benefits package

Job summary

A leading technology company in San Diego is seeking an ASIC design engineer with strong RTL development skills. The role involves developing RTL for micro-architecture and collaborating closely with verification and design teams. Minimum qualifications include a Bachelor’s degree and 2+ years of experience in microprocessor design. The salary for this position ranges from $127,200 to $190,800, complemented by a competitive benefits package.

Qualifications

• 2+ years of practical experience with RTL development.
• Experience with high-performance microprocessor design.
• Knowledge of ASIC design flow from RTL to GDS2.

Responsibilities

• Develop RTL for multiple logic blocks of Hexagon/NPU.
• Run frontend tools to check for design compliance.
• Collaborate with verification team for testing.

Skills

RTL development

Microprocessor design

SystemVerilog

Power optimization

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical Engineering or related field

PhD in Electrical Engineering or related field

Tools

Simulation tools

Linting tools

Job description

A leading technology company in San Diego is seeking an ASIC design engineer with strong RTL development skills. The role involves developing RTL for micro-architecture and collaborating closely with verification and design teams. Minimum qualifications include a Bachelor’s degree and 2+ years of experience in microprocessor design. The salary for this position ranges from $127,200 to $190,800, complemented by a competitive benefits package.