ASIC Physical Design Engineer — Synthesis to Timing Closure

Alpaca Research; Cambridge (MA); On-site; USD 150,000 - 210,000; Full time

Job summary

Alpaca Research is hiring for a full‑time, on‑site ASIC physical design role in Cambridge, MA. You will contribute to the physical implementation of Alpaca's ASIC designs, from synthesis through place and route and timing closure, starting with defined blocks and growing ownership as you gain experience.

The role emphasizes strong fundamentals in digital IC design, VLSI, and proficiency in Python and Tcl, with collaboration across silicon, RTL, and architecture teams. 2027 start for onsite work.

Qualifications

• Master's or PhD in Electrical Engineering, Computer Engineering or related field, expected Dec 2026–Jun 2027.
• Hands-on ASIC physical design experience from research, coursework or internship with ownership of implementation and debugging.
• Experience taking RTL/netlist through place & route to DRC-clean layout and timing closure using Cadence, Synopsys or Open-source tools.
• Strong foundations in digital IC design, VLSI, CMOS logic, synchronous design, clocking and interconnect delay.
• Programming in Python and Tcl; comfortable with Linux.
• Strong analytical and debugging skills with ability to explain results and tradeoffs clearly.

Responsibilities

• Implement blocks through synthesis, floorplanning, placement, clock-tree synthesis and routing; use static timing to guide closure.
• Analyze timing, congestion, area and power; implement changes and measure effects.
• Write Tcl and Python scripts to automate steps, reproduce runs and summarize results.
• Contribute to SRAM macro placement, power-grid planning and physical verification for memory-intensive blocks.
• Collaborate with RTL, verification and architecture engineers to understand design choices on physical implementation.
• Document results, participate in design reviews, and take increasing responsibility for block deliverables.

Skills

Digital IC design

VLSI

Python

Tcl

Linux

Analytical thinking

Debugging

Education

Master's or PhD in Electrical/Computer Engineering

Tools

Cadence

Synopsys

OpenROAD

OpenSTA

Yosys

KLayout

Magic

Job description

Alpaca Research is hiring for a full‑time, on‑site ASIC physical design role in Cambridge, MA. You will contribute to the physical implementation of Alpaca's ASIC designs, from synthesis through place and route and timing closure, starting with defined blocks and growing ownership as you gain experience.

The role emphasizes strong fundamentals in digital IC design, VLSI, and proficiency in Python and Tcl, with collaboration across silicon, RTL, and architecture teams. 2027 start for onsite work.