ASIC Package Engineering Intern – Innovate in Packaging

AMD

Santa Clara (CA)

Hybrid

USD 34,000 - 48,000

Full time

14 days+

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Job summary

AMD invites students for Spring/Summer Co-op or Summer Internship roles in San Jose/Santa Clara, CA. You’ll join packaging design teams onsite or hybrid, contributing to design development and testing across AMD products and AI initiatives.

You’ll learn substrate/interposer/bump design, perform verification tasks, analyze yields, and collaborate with cross-functional partners to achieve cost-efficient, high-yield packaging solutions. This role runs through 2027.

Qualifications

  • Enrolled in a US university pursuing a Bachelor’s degree in Electrical/Engineering or related field.
  • Knowledge of scripting languages (Python/Perl/SQL).
  • Experience with data analytics and visualization tools like PowerBI.

Responsibilities

  • Support package design and development engineers on prioritizing and optimizing projects.
  • Assist in substrate, interposer and bump designs for AMD products and test vehicles.
  • Contribute to design verification efforts and improve yield and performance.

Skills

Python
Perl
SQL
PowerBI

Education

Bachelor's degree student (US) in Electrical/Engineering/related

Tools

Package design software
Silicon/PCB design software

Job description

AMD invites students for Spring/Summer Co-op or Summer Internship roles in San Jose/Santa Clara, CA. You’ll join packaging design teams onsite or hybrid, contributing to design development and testing across AMD products and AI initiatives.

You’ll learn substrate/interposer/bump design, perform verification tasks, analyze yields, and collaborate with cross-functional partners to achieve cost-efficient, high-yield packaging solutions. This role runs through 2027.

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