ASIC Design Verification Engineer [Security Group] – Sr Staff

Anysilicon; Santa Clara (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

Qualcomm is seeking an ASIC Design Verification Engineer in its Security Group to lead verification activities for high-performance SOCs. The role involves collaborating with architects to define verification strategies and develop scalable testbenches across environments.

You will create robust verification methodologies, build comprehensive environments with stimuli, checkers, monitors, and coverage, and drive debugging and progress tracking to ensure designs meet performance goals for market

Qualifications

• Experience with SOC-level verification architectures and methodologies.
• Strong understanding of verification concepts and testbench development.

Responsibilities

• Collaborate with subsystem and SOC Architects to understand high-level system requirements.
• Develop detailed Test and Coverage plans based on architecture and micro-architecture.
• Create Verification Methodology for scalability and portability across environments.
• Build Verification environments including Stimulus, Checkers, Monitors, Assertions, and Coverpoints.
• Execute Verification Plans, including Design Bring-up and Debug of test failures.
• Track and report DV progress using various metrics.

Skills

SV/UVM

ARM/RISC-V

Cryptography

Python

Perl

Unix

Job description

ASIC Design Verification Engineer [Security Group] – Sr Staff

Qualcomm is seeking a Hardware Engineer to drive innovation in electronic systems design and verification. This role involves collaborating with cross-functional teams to develop and validate cutting-edge products, ensuring they meet performance standards and are ready for market launch.

Responsibilities:

• Collaborate with subsystem and SOC Architects to understand high-level system requirements.
• Develop detailed Test and Coverage plans based on architecture and micro-architecture.
• Create Verification Methodology for scalability and portability across environments.
• Build Verification environments including Stimulus, Checkers, Monitors, Assertions, and Coverpoints.
• Execute Verification Plans, including Design Bring-up and Debug of test failures.
• Track and report DV progress using various metrics.

Qualifications:

• Minimum 10 years of SOC-level verification experience.
• Strong understanding of ARM-based or RISC-V processors and APB/AHB/AXI protocols.
• Solid grasp of SV/UVM concepts and cryptographic algorithms preferred.
• Basic knowledge of UNIX commands and Python/Perl scripting.

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP