SOC Verification and Methodology Engineer

Qualcomm; San Diego (CA); On-site; USD 164,000 - 246,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to shape 5G and AI/ML platforms.

This role sits within Qualcomm's Global SOC organization, offering the chance to impact 5G product lines from Snapdragon chips to AI/ML and autonomous driving. As an SOC Verification and Methodology Engineer, you will develop verification methodologies, create test plans, and execute verification tests to identify design issues; you

Qualifications

• Bachelor’s degree in Science, Engineering, or related field with 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master’s degree in Science, Engineering, or related field with 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field with 4+ years of ASIC design, verification, validation, integration, or related work experience.

Responsibilities

• Develop Verification Plans: understand design specs and define verification scope; develop test plans and infrastructure.
• Execute Verification Tests: implement and run tests; debug complex issues; analyze SystemVerilog assertions and coverage.
• Collaborate with Teams: work with architects, designers, and pre-/post-silicon verification teams across locations.

Skills

SystemVerilog/UVM

Assertion & Coverage

Test Planning

Large HW Design Verification

Education

Bachelor’s degree in Science/Engineering

Master’s degree in Science/Engineering

PhD in Science/Engineering

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group > ASICS Engineering

General Summary

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world‑changing technologies and products. This is the Invention Age - and this is where you come in.

We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals and drive to innovate new solutions. This position under Qualcomm's Global SOC organization offers the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and to Autonomous driving. We have crafted a team of exceptional engineers stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future.

Job Overview

Qualcomm SoC HW team is responsible for developing and delivering best-in-class premium tier smartphone SoC solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer, you will be responsible for ensuring the quality and functionality of System‑on‑Chip (SOC) designs through comprehensive verification processes. You will develop and implement verification methodologies, create test plans, and execute verification tests to identify and resolve design issues. In this role of Design Verification Engineer, you will be using advanced state‑of‑the‑art tools, verification techniques and methodologies to verify varied design IPs in addition to system‑level integration validation aspects.

Key Responsibilities

• Develop Verification Plans: Understand design specifications and define the verification scope. Develop detailed test plans and verification infrastructure.
• Execute Verification Tests: Implement and execute verification test cases and debug complex issues. Implement and analyze System Verilog assertions and coverage (code, toggle, functional).
• Collaborate with Teams: Work closely with architects, designers, and pre‑ and post‑silicon verification teams to accomplish tasks.
• Innovate Solutions: Develop innovative solutions to verification challenges with minimal guidance. Ramp‑up on new verification tools and methodologies. Explore innovative DV methodologies to continuously push the quality and efficiency of test benches.
• Adhere to Standards: Maintain quality standards and best practices in test and verification processes.
• Successful candidates will be required to collaborate with worldwide design, verification, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills.

Qualifications

• Bachelor’s degree in Science, Engineering, or related field
• Minimum 10+ years of design verification experience. Senior positions to be offered to candidates with proven expertise in the relevant field
• Good understanding of SystemVerilog/UVM based verification skills and experience with assertion & coverage‑based verification methodology
• Experience in handling verification from Test planning to Tapeout for large‑size HW Design

Preferred Qualifications

• Master’s degree in Science, Engineering, or related field
• 15+ years industry experience with below skillset:
• Knowledge of SOC architecture, CPU architecture (ARM knowledge is helpful), DSP, AMBA Bus, DDR, GPU, Multimedia etc.
• Exposure to ARM SBSA (Server Base System Architecture)
• Experience with heterogeneous multi‑die system verification
• Experience with D2D interfaces (e.g., UCIe, CXL) verification
• Experience with pre‑silicon emulation platform‑based verification
• Knowledge of Power design, architecture, and verification requirements
• Displays a passion for debugging and strong problem‑solving abilities
• Experience with scripting languages such as Perl, Python is a plus
• Assertion coding and converging on Formal tools, is a plus

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience
• OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
• OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience

EEO Statement

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay Range and Compensation

$164,000.00 - $246,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.