ASIC Design Verification Engineer (Security Group) - Sr Staff

QUALCOMM, Inc.; Santa Clara (CA); On-site; USD 190,000 - 285,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Hardware Engineer to plan, design, verify, and test complex SOC-level hardware and RF/analog systems, bringing up yield, packaging, and test infrastructure.

You will collaborate with chip architects and cross-functional teams to develop verification plans, implement SystemVerilog/UVM environments, and drive bring-up and validation to product launch.

Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master’s degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Responsibilities

• Leverage advanced knowledge of architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and secure designs.
• Anticipate, identify, and solve highly-complex problems to ensure design completeness, functionality, power, and performance.
• Collaborate with cross-functional teams to define requirements, specifications, and trade-offs (e.g., performance, power, cost, functionalities, etc.) in order to accomplish product goals.
• Evaluates all aspects of the design process from conceptualization to productization (i.e., architecture definition, feasibility, pre-silicon design and verification, and post-silicon validation) that meet customer and industry standards.
• Writes detailed technical documentation (e.g., feature descriptions, architectural descriptions, verification test plans, and implementation details, etc.) for highly complex secure subsystem designs; reviews documentation of junior engineers.
• Propose meetings and technical discussions to review Test Plans, debug issues and incorporate feedback into existing documentation and Test Plans.
• Run and Analyze Coverage reports, understand Coverage holes and re-spin Test Plans to achieve coverage metrics.

Skills

SystemVerilog

UVM

Synopsys VCS/Verdi

Makefile automation

Python scripting

Assertion-based verification

Functional coverage

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

None

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting‑edge, world-class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Qualifications:

Minimum Experience Level should be 10+ years in SOC-level verification with good understanding of debugging either ARM-based or RISC-V based processors, good understanding of APB/AHB/AXI protocols. Must have solid understanding of SV/UVM concepts. Prior experience in any cryptographic algorithm is preferred. Must have basic understand on UNIX commands and Python/Perl scripting.

Required Skills:

• SystemVerilog
• UVM
• Synopsys VCS/Verdi
• Makefile automation
• Python scripting
• Assertion-based verification
• Functional coverage

As a Design Verification Engineer, you will work with Chip Architects to validate the concepts of core and sub-system level micro-architectures. You will work on a selected part of the subsystem Design Verification to ensure that it functions to the standards of being launch ready for the end Product.

Role and Responsibilities

• Work with subsystem and SOC Architects to understand the concepts and high-level system requirements.
• Develop detailed Test and Coverage plans based on the Architecture and Micro-architecture.
• Develop Verification Methodology, ensuring scalability and portability across environments.
• Develop Verification environment, including all the respective components such as Stimulus, Checkers, Monitors Assertions, and Coverpoints.
• Develop Verification Plans and Testbenches for your functional domain.
• Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures.
• Track and report DV progress using a variety of metrics, including Bugs and Coverage.

Preferred Qualifications

• Deep knowledge of APB/AXI/SPI protocols, handshake mechanisms, cross-clock domains and clock gating.
• Solid understand of memory organization, fault-tolerant design, parity schemes, error detection and error correction schemes.
• Advance techniques such as: Formal, Assertions, and Silicon bring-up, is helpful.
• In-depth knowledge of Micro-processor functions, Network-on-Chip Architectures, and Micro-architectures.
• Experience in writing Test plans, portable Testbenches, Transactors, and Assembly code.
• Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Mixed signal Verification.
• Ability to develop and work independently on a Block/Unit of the design.

Principal Duties and Responsibilities

• Leverage advanced knowledge of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and secure designs
• Anticipate, identify, and solve highly-complex problems to ensure design completeness, functionality, power, and performance.
• Collaborate with cross-functional teams to define requirements, specifications, and trade-offs (e.g., performance, power, cost, functionalities, etc.) in order to accomplish product goals.
• Evaluates all aspects of the design process from conceptualization to productization (i.e., architecture definition, feasibility, pre-silicon design and verification, and post-silicon validation) that meet customer and industry standards.
• Writes detailed technical documentation (e.g., feature descriptions, architectural descriptions, verification test plans, and implementation details, etc.) for highly complex secure subsystem designs; reviews documentation of junior engineers.
• Propose meetings and technical discussions to review Test Plans, debug issues and incorporate feedback into existing documentation and Test Plans.
• Run and Analyze Coverage reports, understand Coverage holes and re-spin Test Plans to achieve coverage metrics.

Level of Responsibility

• Work independently with minimal supervision.
• Provide supervision/guidance to other team members.
• Decision-making is significant in nature and affects work beyond immediate work group.
• Require verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.
• Has a moderate amount of influence over key organizational decisions.
• Tasks do not have pre-defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• OR
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• OR
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Pay range and Other Compensation & Benefits

• $190,200.00 - $285,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.