ASIC CAD Implementation Engineer

Meta

Sunnyvale (CA)

On-site

USD 114,000 - 172,000

Full time

3 days ago
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Job summary

Meta seeks an ASIC Implementation Engineer to join the Infrastructure Silicon team in Sunnyvale, CA. You will develop CAD methodologies, flows, and automation for front-end and back-end ASIC implementation from RTL through signoff.

You will collaborate with design, physical design, and verification engineers to enable high-quality tape-outs of Meta's next-generation data-center chips. Relevant CAD/EDA experience is essential, and Python is strongly preferred.

Qualifications

  • Bachelor's degree completed before joining Meta.
  • 2+ years of experience in synthesis & physical design.
  • Proficiency in Python for algorithms and automation.
  • Experience developing CAD/EDA tools, flows or automation.
  • Experience with RTL synthesis, physical design and PPA optimization.

Responsibilities

  • Design and maintain production CAD platforms and web-based tooling for silicon exploration.
  • Build data models and Python APIs for large-scale design data to speed up analysis.
  • Develop tooling for SOC floorplans and early exploration across hierarchy.
  • Develop debug features for connectivity and timing/area optimization.
  • Create automation across FE tools and coordinate with design teams.

Skills

Python
Synthesis & Physical Design
Automation
Cross-functional collaboration

Education

Bachelor's degree in Computer Science or Computer Engineering or equivalent

Job description

Meta seeks an ASIC Implementation Engineer to join the Infrastructure Silicon team in Sunnyvale, CA. You will develop CAD methodologies, flows, and automation for front-end and back-end ASIC implementation from RTL through signoff.

You will collaborate with design, physical design, and verification engineers to enable high-quality tape-outs of Meta's next-generation data-center chips. Relevant CAD/EDA experience is essential, and Python is strongly preferred.

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