ASIC Implementation CAD Engineer — Python, Flows & Equity

Meta; Austin (TX); On-site; USD 114,000 - 172,000; Full time

Job summary

Meta is seeking an ASIC Implementation Engineer to advance CAD methodologies for data center silicon. You will develop front-end and back-end flows from RTL to physical design signoff, building scalable tooling and automation to enable fast, high-quality tape-outs.

You will collaborate with design, DV, architecture and PD engineers, delivering improved data models, floorplanning tools, and connectivity analysis for large-scale chip projects at Meta. This is a full-time role based in Austin, TX.

Qualifications

• Bachelor's degree completed before joining Meta.
• 2+ years of experience in synthesis & physical design.
• Proficiency in Python for automation and analysis.
• Experience developing CAD/EDA tools, flows, or automation.
• Experience with RTL synthesis, physical design, and PPA optimization.

Responsibilities

• Design, develop and maintain CAD platforms and tooling for silicon design exploration and analysis.
• Build data models and Python APIs for large-scale design data to improve runtimes.
• Develop floorplan generation tools and early floorplan exploration capabilities.
• Create debug features for connectivity and timing/area optimization on DEF/netlist data.
• Automate FE tools and collaborate with cross-functional teams on handoffs and timing feedback.

Skills

Python

Synthesis & PD

CAD/EDA tooling

Cross-functional collaboration

Education

Bachelor's degree in Computer Science or Computer Engineering or equivalent

Tools

Verilog netlist

LEF/DEF

Liberty

SDC

Job description

Meta is seeking an ASIC Implementation Engineer to advance CAD methodologies for data center silicon. You will develop front-end and back-end flows from RTL to physical design signoff, building scalable tooling and automation to enable fast, high-quality tape-outs.

You will collaborate with design, DV, architecture and PD engineers, delivering improved data models, floorplanning tools, and connectivity analysis for large-scale chip projects at Meta. This is a full-time role based in Austin, TX.