ASIC Engineer, EDA Infrastructure

Meta; Sunnyvale (CA); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Meta is hiring ASIC EDA Infrastructure Engineers in Sunnyvale, CA to build and support front-end implementation flows, physical design flows, and RTL2GDS processes for data center SoC projects.

You will collaborate with EDA vendors, manage licenses, and help optimize compute grids, storage, and CI pipelines. A Computer Science/Engineering degree or equivalent practical experience is required.

Qualifications

• Bachelor's degree in CS/CE or related field, or equivalent practical experience.

Responsibilities

• Front End implementation flow development and support.
• Physical Design implementation flow development and support.
• RTL2GDS flow development and support.
• Internal tools development and automation to improve productivity across ASIC design cycles (e.g., RTL generation tools, memory selection automation, register generation, filelist generation).
• Work with EDA vendors on tools/tech evaluation and adoption.
• Manage internal EDA licenses, installation, and forecast; maintain tools.
• Collaborate with internal infrastructure on compute grid, storage management, and job scheduling; ensure efficiency and maintenance.
• Assist in adapting internal infrastructure to ASIC design solutions (SCM, CI, data management, reporting).

Education

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Job description

# ASIC Engineer, EDA InfrastructureSunnyvale, CA+2 locationsEngineering+ 3 moreApply nowMeta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure ASIC organization. We are looking for individuals with experience in EDA flow and methodology, CAD/automation and ASIC infrastructure to build System on Chip (SoC) and IP for data center applications.---## ASIC Engineer, EDA Infrastructure Responsibilities* Front End implementation flow development and support* Physical Design implementation flow development and support* RTL2GDS flow development and support* Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tools, memory selection automation, register generation, filelist generation* Work with EDA vendors on new tools/technology and new features evaluation and adoption* Manage the internal EDA license requests, installation and license forecast as well as EDA tool installation and maintenance* Work with internal infrastructure team on compute grid, storage management and job scheduling architecture, efficiency and maintenance* Work with internal infrastructure team on adapting internal infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management and reporting## Minimum Qualifications* Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta