Analog Mixed-Signal IC Design Engineer (Power Management)

Qualcomm Incorporated; San Diego (CA); On-site; USD 122,000 - 183,000; Full time

Benefits offered by this job

RSU grants

Annual discretionary bonus

Comprehensive benefits package

Job summary

Qualcomm Technologies, Inc. in San Diego seeks a CMOS analog/mixed-signal design engineer responsible for the definition, verification and documentation of analog and mixed-signal blocks such as data converters, PLLs, and regulators.

You will guide design from concept to layout and ensure performance targets are met. You will work with layout teams, run complex simulations, document results, and contribute to new initiatives while collaborating across engineering groups.

Qualifications

• Bachelor's degree in Electrical Engineering with 2+ years of analog/mixed-signal CMOS design experience.
• 2+ years of ASIC design/verification experience.
• PhD or MS with relevant ASIC/analog background is acceptable.

Responsibilities

• Define architecture and block-level design for IPs/Chips and participate in design reviews.
• Oversee block-level layout with layout teams to ensure design intent.
• Define verification plans and run simulations to meet power, performance, and functionality targets.
• Design, program, and run tests; analyze bench/ATE data to identify issues.
• Collaborate with internal users and third-party vendors to align implementations.
• Write technical documentation and design descriptions for complex projects.
• Contribute ideas for new initiatives and future directions.

Skills

Analog/Mixed-Signal design

CMOS circuits

Documentation

Senior leadership interaction

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence

SPICE

MATLAB

Verilog/VHDL

Job description

Qualcomm Technologies, Inc. in San Diego seeks a CMOS analog/mixed-signal design engineer responsible for the definition, verification and documentation of analog and mixed-signal blocks such as data converters, PLLs, and regulators.

You will guide design from concept to layout and ensure performance targets are met. You will work with layout teams, run complex simulations, document results, and contribute to new initiatives while collaborating across engineering groups.