Senior PMIC Design Engineer (Power Management)

Qualcomm; Santa Clara (CA); On-site; USD 153,000 - 230,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an experienced Power Management IC design engineer to oversee architecture, verification, and layout for PMIC subsystems.

You will drive design strategies for controller circuitry and high-current power stages, guiding layout teams and coordinating silicon bring‑up and characterization across process corners. The role requires strong expertise in analog/mixed-signal IC design, Cadence tools, and MATLAB, with a track record of delivering complex PMIC blocks.

Qualifications

• Bachelor's degree in Electrical Engineering and 6+ years of analog, mixed-signal or Power Management IC design experience.
• Master's degree in Electrical Engineering or related field with 4+ years of analog, mixed-signal or Power Management IC design experience.
• PhD in Electrical Engineering or related field with 2+ years of analog, mixed-signal or Power Management IC design experience.
• 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.

Responsibilities

• Uses tools/applications (e.g., Cadence ADE, Spectre, MATLAB) to execute architecture implementation, circuit design, and verification of complex IC blocks.
• Owns the design and verification strategy for assigned blocks or subsystems within power management ICs, including controller circuitry.
• Guides layout engineers to generate high‑quality layouts and conducts physical and reliability verification.
• Runs advanced functionality and performance checks to ensure designs meet specifications across PVT and operating conditions.
• Interprets simulation, silicon characterization, and debug results, driving corrective design actions.
• Documents detailed design intent, architectural decisions, and silicon findings for PMIC subsystems.
• Collaborates with validation, test, and product engineering teams to support silicon bring‑up and production ramp.
• Maintains awareness of industry trends and applies insights to ongoing designs.
• Provides technical guidance and mentoring through design reviews and problem solving.

Skills

Analog/Mixed-Signal IC Design

Power Management IC Design

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence

SPICE

MATLAB

Verilog/VHDL

Job description

Qualcomm Technologies, Inc. is seeking an experienced Power Management IC design engineer to oversee architecture, verification, and layout for PMIC subsystems.

You will drive design strategies for controller circuitry and high-current power stages, guiding layout teams and coordinating silicon bring‑up and characterization across process corners. The role requires strong expertise in analog/mixed-signal IC design, Cadence tools, and MATLAB, with a track record of delivering complex PMIC blocks.