Advanced Packaging Engineer — 2.5D/3D Interposers

SK hynix America; San Jose (CA); On-site; USD 110,000 - 155,000; Full time

Benefits offered by this job

Top Tier health insurance at no employee cost

Paid time off (PTO) + Company Holidays + Happy Fridays

Paid Parental Leave Program

401k Matching

Educational reimbursement up to $10,000 per year

Donation Matching and volunteering opportunities

Free Breakfast/Lunch/Dinner provided to employees

Job summary

A leading semiconductor firm in San Jose, CA is seeking an Advanced Package Design Engineer. This role involves designing and optimizing high-performance, high-density interposers for chiplet-based architectures. The ideal candidate should have at least 3 years of experience in semiconductor package design, particularly with relevant layout tools. Strong collaboration with PCB and manufacturing teams is essential. The company offers competitive compensation and a comprehensive benefits package including top-tier health insurance and educational reimbursement.

Qualifications

• 3+ years of experience in semiconductor package design or layout.
• Proven experience with layout tools Virtuoso/APD, Synopsys Custom Compiler, and Siemens Xpedition.
• Familiar with 2.5D/3D packaging technologies and substrate design rules.

Responsibilities

• Design silicon and organic interposers for advanced packaging solutions.
• Perform design studies and scenario analysis to optimize package design.
• Collaborate with stakeholders to ensure seamless packaging technology development.

Skills

EDA tools (Virtuoso/APD, Synopsys Custom Compiler, Siemens Xpedition)

High-speed signal routing

Power distribution networks (PDN)

Effective communication

Education

Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, or Material Science

Tools

Ansys

HFSS

ADS

Job description

A leading semiconductor firm in San Jose, CA is seeking an Advanced Package Design Engineer. This role involves designing and optimizing high-performance, high-density interposers for chiplet-based architectures. The ideal candidate should have at least 3 years of experience in semiconductor package design, particularly with relevant layout tools. Strong collaboration with PCB and manufacturing teams is essential. The company offers competitive compensation and a comprehensive benefits package including top-tier health insurance and educational reimbursement.