Senior SoC Verification Engineer for AI-Powered SoCs

Tetramem; Singapore; On-site; SGD 80,000 - 180,000; Full time

Job summary

A leading AI technology firm in Singapore is seeking an experienced Verification Engineer to work on SoC design verification. The ideal candidate will have a Master's or Ph.D. in Electrical Engineering or related fields, along with extensive experience in UVM/OVM and verification methodologies. You will collaborate closely with design engineers, develop infrastructure for automated verification, and mentor junior team members. This role offers a competitive salary range and the chance to work at the forefront of AI innovations.

Qualifications

• MS with 8+ years of relevant experience or PhD with 3+ years.
• Knowledge of UVM/OVM and verification methodologies.
• Extensive experience in test planning and coverage closure.

Responsibilities

• Collaborate with design engineers on test plans.
• Build infrastructure for automation verification.
• Mentor team members while driving verification efficiency.

Skills

UVM/OVM

Test planning

Verilog

System Verilog

Python

C/C++

Scripting

Education

MS in Electrical Engineering or related

PhD in Electrical Engineering or related

Tools

Semiformal Verification tools

Testbench development tools

Job description

A leading AI technology firm in Singapore is seeking an experienced Verification Engineer to work on SoC design verification. The ideal candidate will have a Master's or Ph.D. in Electrical Engineering or related fields, along with extensive experience in UVM/OVM and verification methodologies. You will collaborate closely with design engineers, develop infrastructure for automated verification, and mentor junior team members. This role offers a competitive salary range and the chance to work at the forefront of AI innovations.