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Senior Product Development Engineer (ATE)

ADVANCED MICRO DEVICES (SINGAPORE) PTE LTD

Singapore

On-site

SGD 75,000 - 100,000

Full time

Today
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Job summary

A leading technology firm in Singapore is seeking a Senior ATE Product Development Engineer to drive test solutions for New Product Introduction (NPI). The ideal candidate will have expertise in ATE test patterns, strong technical and analytical skills, and experience in collaboration with cross-functional engineering teams. Responsibilities include developing solutions to meet business milestones and optimizing test methods for quality and efficiency. Candidates must possess a degree in Electrical Engineering or a related field.

Qualifications

  • Strong understanding of DFT architecture for SOC products.
  • Experience with test patterns and characterization in NPI.
  • Software programming proficiency in C++, Java, Python, etc.

Responsibilities

  • Drive test solutions to meet NPI business goals.
  • Pre-silicon and post-silicon engagement with Design teams.
  • Conduct engineering evaluations to resolve technical issues.

Skills

Technical problem-solving
Data analysis
Test development
Collaboration
Software programming proficiency

Education

Degree in Electrical Engineering or comparable discipline

Tools

ATE Test platforms
Advantest V93K
ATPG SCAN
HVM processes
Job description
THE ROLE:

We are a growing Product and Test Engineering team who manages critical and strategic New Product Introduction (NPI) and sustaining to support the Embedded Business Unit. We do exciting product development based on leading-edge technology that will power the next generation processors used for automotive, high-end networking and storage, industrial, aerospace and defense.

If you are looking for a fulfilling and challenging career as an engineer inNPI ATE Product Development, you are in the right place! As a Senior ATE Product Development Engineer, you will be responsible for developing and driving ATE test solutions to meet NPI business milestones and KPI metrics (test time, yield, cost, quality). The expectation is to perform technical leadership through interaction with DFT and CT IP teams, Product & Test Engineering teams, Quality & Reliability teams, software & platform teams to come up with the best solution that balances quality and cost. You will experience working with and learning from AMD’s talented engineering teams around the world.

THE PERSON:

We are looking for someone with strong technical, analytical and problem-solving skills, as well as demonstrating the characteristics of an independent and resourceful individual.

The applicant must have a proficient understanding of DFT(Design-For-Test) architecture for SOC (System-On-Chip) product, a strong test development, Silicon characterization/debug working experience with various industry standard ATE test platforms, as well as data analysis.

KEY RESPONSIBILITIES:
  • Accountable for driving test solution/coverage development, optimization to meet business milestones: schedule, test time, yield, cost and quality.
  • Pre-Silicon engagement with Design, test solution/methodology scoping, planning & validation
  • Post Silicon Bring up of test patterns and calibration enablement leading to optimization for mass production enablement
  • Optimization of test coverage and flows for increased quality, yield, cost improvement, and test time reduction
  • Conduct engineering evaluations and analysis to drive closure of technical issues during NPI and sustaining phases
  • Solves complex, novel, and non-recurring problems; initiate significant changes to existing processes/methods and leads development and implementation
  • Influences technical decisions that have a significant impact on final product
  • Involves collaboration on or assuming the consultative or leadership responsibilities for a specific project or for product development initiatives
  • Provide technical supervision or mentoring junior engineers
  • Familiar with RMA debug is a plus.
PREFERRED EXPERIENCE:
  • Experience in ATE Test patterns, calibration test flows/method development, debug, test and characterization experience working in an NPI Product Engineering team.
  • Hands-on experience in bringing up ATPG SCAN, MBIST, HSIO, Functional or Thermal content in ATE tests, preferably for products using latest silicon designs and advanced process technology nodes.
  • Hands-on experience in ATE Test handling/ execution and development experience - Advantest V93K experience preferred. (Advantest SMT7 or SMT8 experience is a plus)
  • Good understanding of RMA test program development, debug analysis and solution enablement related to test escapes.
  • Software programmingand scripting proficiency (C++, Java, Groovy, Perl, Ruby, Python)
  • Experience with HVM (High Volume Manufacturing) is a strong plus
  • Strong and effective presentation, written and verbal communication skills, and the ability to work with geographically distributed product engineering teams
  • Excellent interpersonal, organizational, and analytical skills
ACADEMIC CREDENTIALS:
  • Degree in Electrical Engineering, Computer Engineering, or comparable disciplines
LOCATION:

Singapore

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