Senior APTD Packaging & Wafer‑Level Tech Engineer

Micron Technology, Inc; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Micron Technology, Inc. in Singapore is seeking a Staff/Principal, APTD CEM within Advanced Packaging Wafer Level Technology Engineering to lead development and deployment of post-fab wafer finishing processes.

You will collaborate with Package Integration, Front End Wafer Fab, Assembly/Test and Global Quality teams to ensure performance, cost, reliability and smooth product transfer to production. The role emphasizes AI-enabled tooling, data analytics, and strong leadership to deliver

Qualifications

• PhD with ≥2 years, or Master’s ≥5, or Bachelor’s ≥7 years in electrical engineering or related fields.
• Experience in semiconductor process development, wafer bonding, plating, warpage control and packaging.
• Strong data analytics and programming skills (Python, R, SQL).

Responsibilities

• Develop and enable post-fab wafer finishing processes to meet performance and reliability.
• Coordinate with cross-functional teams to transfer processes to high-volume manufacturing.
• Apply AI-enabled tools to improve yield and process control.

Skills

Python

R

SQL

Data analytics

Statistics

Automation

Education

PhD in Electrical Engineering or related field

Master's degree

Bachelor's degree

Tools

Visual Basic for automation

E3

FDC

RMS

Job description

Micron Technology, Inc. in Singapore is seeking a Staff/Principal, APTD CEM within Advanced Packaging Wafer Level Technology Engineering to lead development and deployment of post-fab wafer finishing processes.

You will collaborate with Package Integration, Front End Wafer Fab, Assembly/Test and Global Quality teams to ensure performance, cost, reliability and smooth product transfer to production. The role emphasizes AI-enabled tooling, data analytics, and strong leadership to deliver