NPI ATE Product Development Lead

AMD; Singapore; On-site; SGD 110,000 - 180,000; Full time

Job summary

AMD Singapore is seeking a Product Development Manager to lead the NPI ATE test development for data center graphics. You will drive test coverage, coordinate with Design, Test Eng, Quality and software teams to balance performance, yield and cost.

The role requires strong DFT knowledge, pre/post silicon activities, and mentoring engineers across global teams; a BS/MS in Electrical/Computer Engineering and hands-on ATE experience are preferred.

Qualifications

• BS/MS in Electrical Engineering or Computer Engineering or equivalent.
• Strong technical and analytical skills with leadership experience.
• Proficient understanding of DFT architecture for SOC.
• Experience with ATE test platforms and data analysis.
• Strong communication and collaboration across distributed teams.

Responsibilities

• Drive test solution and coverage development to meet milestones, cost and quality.
• Develop ATE test patterns, flows, and characterization; debug tests.
• Pre-Silicon engagement with Design and planning; validation.
• Post-Silicon bring-up of test patterns for mass production enablement.
• Characterize and debug new silicon designs and technologies.
• Optimize test coverage for quality, yield, cost, and test time.
• Conduct engineering evaluations to close production issues.
• Provide leadership and mentorship to junior engineers; influence key decisions.

Skills

DFT architecture understanding

ATE test platforms

Advantest V93K

Advantest SMT8

C++

Java

Groovy

Perl

Ruby

Python

Windows

Linux

HVM (High Volume Manufacturing)

Communication skills

Education

BS/MS Electrical Engineering or Computer Engineering

Tools

Advantest V93K

Advantest SMT8

Job description

AMD Singapore is seeking a Product Development Manager to lead the NPI ATE test development for data center graphics. You will drive test coverage, coordinate with Design, Test Eng, Quality and software teams to balance performance, yield and cost.

The role requires strong DFT knowledge, pre/post silicon activities, and mentoring engineers across global teams; a BS/MS in Electrical/Computer Engineering and hands-on ATE experience are preferred.