HBM Product Engineering Lead: Test & Yield

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD

Singapore

On-site

SGD 150,000 - 190,000

Full time

5 days ago
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Job summary

Micron Semiconductor Asia Operations Pte Ltd in Singapore seeks an experienced engineering leader to drive High Bandwidth Memory (HBM) product engineering and media health initiatives. You will mentor a high‑performing team, lead test flow optimization, and collaborate with Fab, Design, and Quality groups to improve yield, cost, and cycle times.

The role requires 8+ years in semiconductors, strong leadership, problem‑solving, and data skills; travel to the US, Taiwan, and Japan is possible.

Qualifications

  • Bachelor’s or Master’s degree in Electrical & Electronics Engineering; 8+ years in semiconductor industry.
  • Strong leadership and problem-solving skills with in-depth circuit analysis.
  • Proficient in statistics and data analysis tools; capable of scripting.
  • Willingness to adapt to dynamic roles and lead technical programs.
  • Proven ability to collaborate across multiple teams to solve complex problems.

Responsibilities

  • Optimize test coverage for current and future HBM designs and process nodes.
  • Develop, validate, characterize, and qualify Micron’s next‑generation HBM products.
  • Support design verification and circuit analysis for new products using CAD tools and Verilog simulations.
  • Improve manufacturing test yield and reduce test time; address device- and yield-related issues.
  • Collaborate with cross-functional teams (Fab, Design, Technology Development, Quality) to ship end products.

Skills

Leadership
Root cause analysis
Statistical analysis
Scripting
Mentoring / development

Education

Electrical & Electronics Engineering degree

Tools

CAD tools
Verilog simulations

Job description

Micron Semiconductor Asia Operations Pte Ltd in Singapore seeks an experienced engineering leader to drive High Bandwidth Memory (HBM) product engineering and media health initiatives. You will mentor a high‑performing team, lead test flow optimization, and collaborate with Fab, Design, and Quality groups to improve yield, cost, and cycle times.

The role requires 8+ years in semiconductors, strong leadership, problem‑solving, and data skills; travel to the US, Taiwan, and Japan is possible.

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