Senior RTL Engineer

Capgemini Engineering; Porto; Presencial; EUR 65 000 - 90 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Health and life insurance

Referral program with bonuses

Great office locations

Career growth programs

Training and certifications

International projects

Resumo da oferta

Capgemini Engineering is seeking a Senior RTL Engineer in Porto, Portugal, to drive digital design from architecture through tape-out on high-performance, power-efficient SoCs.

You will define microarchitectures, implement RTL using Verilog/SystemVerilog/VHDL, perform lint/CDC/low-power checks, and collaborate across Verification, Synthesis, STA, Physical Design, and DFT teams to meet timing, area, and power targets.

Qualificações

• Bachelor's or Master's degree in Electrical/ Computer Engineering or related field.
• 6+ years of RTL, ASIC, SoC, or VLSI design experience.
• Strong knowledge of Verilog, SystemVerilog, and/or VHDL.
• Experience in microarchitecture definition and complex digital design.

Responsabilidades

• Perform feasibility studies to support system architecture definition, requirements analysis, and interface specification.
• Define and develop microarchitectures for complex digital blocks and SoCs.
• Implement RTL designs using Verilog, SystemVerilog, or VHDL.
• Execute RTL quality checks, including Lint, CDC, and Low Power verification.
• Develop timing constraints and support synthesis and timing closure activities.
• Collaborate closely with Verification, Synthesis, STA, Physical Design, and DFT teams to achieve functionality, performance, power, and area targets.
• Support design bring-up, integration, and tape-out activities.
• Create and maintain automation scripts, design flows, and engineering tools to improve development efficiency.
• Participate in technical reviews and contribute to continuous improvement initiatives.

Conhecimentos

RTL design

ASIC/SoC/VLSI

Verilog/SystemVerilog/VHDL

Microarchitecture design

Synthesis & STA

Python/Perl/C scripting

Verification methodologies

Problem solving

Communication skills

Team collaboration

Formação académica

Bachelor's or Master's degree in Electrical/Computer Engineering

Ferramentas

Python

Perl

C

Descrição da oferta de emprego

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.

YOUR ROLE

As a Senior RTL Engineer, you will be responsible for driving digital design activities from architecture definition through tape-out, ensuring the successful delivery of high-performance and power-efficient products.

In this role, you will

• Perform feasibility studies to support system architecture definition, requirements analysis, and interface specification.
• Define and develop microarchitectures for complex digital blocks and SoCs.
• Implement RTL designs using Verilog, SystemVerilog, or VHDL.
• Execute RTL quality checks, including Lint, CDC, and Low Power verification.
• Develop timing constraints and support synthesis and timing closure activities.
• Collaborate closely with Verification, Synthesis, STA, Physical Design, and DFT teams to achieve functionality, performance, power, and area targets.
• Support design bring-up, integration, and tape-out activities.
• Create and maintain automation scripts, design flows, and engineering tools to improve development efficiency.
• Participate in technical reviews and contribute to continuous improvement initiatives.

YOUR PROFILE

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 6+ years of experience in RTL, ASIC, SoC, or VLSI design.
• Strong knowledge of Verilog, SystemVerilog, and/or VHDL.
• Proven experience in microarchitecture definition and complex digital design development.
• Solid understanding of SoC design methodologies and integration.
• Hands-on experience with Lint, CDC, and Low Power design methodologies.
• Good knowledge of synthesis flows and Static Timing Analysis (STA).
• Familiarity with CPU architectures and instruction sets such as ARM, RISC-V, or x86.
• Experience with scripting and programming languages such as Python, Perl, or C.
• Understanding of verification methodologies and design flows.
• Strong problem-solving skills and attention to detail.
• Excellent communication skills and ability to work effectively in multicultural and multidisciplinary environments.

WHAT YOU'LL LOVE ABOUT WORKING HERE

• Join a multicultural and inclusive team environment.
• Enjoy a supportive atmosphere promoting work life balance.
• Your career growth is central to our mission. Our array of career growth programs and diverse professionals are crafted to support you in exploring a world of opportunities.
• Access valuable training and certifications in cutting edge technologies.
• Engage in exciting national and international projects.
• Health and life insurance.
• Referral program with bonuses for talent recommendations.
• Great office locations.

ABOUT CAPGEMINI

Capgemini is an AI-powered global business and technology transformation partner, delivering tangible business value. We imagine the future of organizations and make it real with AI, technology and people. With our strong heritage of nearly 60 years, we are a responsible and diverse group of 420,000 team members in more than 50 countries. We deliver end-to-end services and solutions with our deep industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design, engineering and business operations.