Senior Low-Power Verification & Formal Equivalence Engineer

SiFive, Inc.; Hinoba-an; On-site; PHP 900,000 - 1,300,000; Full time

Job summary

SiFive, Inc. seeks a Senior Engineer to drive Low Power Verification and Formal Equivalence signoff for RTL-to-GDSII. You will own static low power checks and UPF verification, partnering with Physical Design and Power teams to ensure correct power intent.

You will lead the LEC flow, implement and verify formal ECOs, and coordinate with backend teams to resolve power and parity issues, delivering robust, verified blocks for the tapeout.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering with 3+ years in ASIC/SoC design and verification.
• Strong UPF knowledge for power intent coding, debugging, and maintenance.
• Experience with static low power checks on RTL and post-PNR netlists using standard tools.
• Hands-on with LEC/Formal Signoff tools and ECO flows.
• Understanding power management libraries and related PD implications.

Responsibilities

• Lead Low Power Signoff Execution across design blocks with full coverage.
• Deploy UPF implementation, verification flows, and automation.
• Own Formal Equivalence Checking flow from RTL to netlists, including ECOs.
• Collaborate with Physical Design and backend teams to resolve power and parity issues.

Skills

UPF proficiency

Static power verification

Formal signoff

Scripting (Tcl, Python)

RTL/post-PNR analysis

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

Synopsys VC Low Power

Synopsys Formality

Job description

SiFive, Inc. seeks a Senior Engineer to drive Low Power Verification and Formal Equivalence signoff for RTL-to-GDSII. You will own static low power checks and UPF verification, partnering with Physical Design and Power teams to ensure correct power intent.

You will lead the LEC flow, implement and verify formal ECOs, and coordinate with backend teams to resolve power and parity issues, delivering robust, verified blocks for the tapeout.