STA Engineer - ASIC Timing & Power, Growth Path

IC Resources

Noord-Brabant

On-site

EUR 55,000 - 85,000

Full time

1 hour ago
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Job summary

IC Resources in the Netherlands seeks an STA Engineer to advance next-generation ASIC timing and power-aware design, coordinating with verification and physical design teams. You will develop constraints and support STA, UPF, and low-power methodologies across partitions, while preparing synthesis and implementation collateral.

The ideal candidate will have experience with ASIC implementation, memory macros, third-party IP, and Linux.

Qualifications

  • Experience in ASIC timing and STA integration.
  • Strong knowledge of SDC and static timing analysis.
  • Experience with synthesis and front-end implementation flows.
  • Understanding UPF and low power design.
  • Experience with memory macros and third-party IP.
  • Familiarity with Linux environment.
  • Tapeout experience is advantageous.

Responsibilities

  • Develop and maintain SDC timing constraints across internal designs and third-party IP.
  • Support static timing analysis and timing closure; work with UPF and low power methodologies across partitions.
  • Prepare synthesis and implementation collateral.
  • Collaborate with physical design teams and external implementation partners.
  • Contribute to floorplanning, partitioning and implementation planning.
  • Support power analysis, DFT and wider implementation activities.

Skills

ASIC implementation
STA (static timing analysis)
SDC timing constraints
UPF/low power
Linux environment
Memory macros
Third-party IP

Tools

Synthesis flows/tools
Floorplanning tools
Memory IP tooling

Job description

IC Resources in the Netherlands seeks an STA Engineer to advance next-generation ASIC timing and power-aware design, coordinating with verification and physical design teams. You will develop constraints and support STA, UPF, and low-power methodologies across partitions, while preparing synthesis and implementation collateral.

The ideal candidate will have experience with ASIC implementation, memory macros, third-party IP, and Linux.

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