Senior/Staff Tool & Methodology Engineer

IC Resources; Eindhoven; On-site; EUR 90,000 - 130,000; Full time

Job summary

IC Resources in Eindhoven is seeking a Senior/Staff Tool & Methodology Engineer to shape the development infrastructure behind next‑generation silicon products. You will own automation and EDA workflows across the ASIC flow, enabling efficient design, verification and delivery.

You will build Python and Tcl based tooling, improve regression environments and support deployment of design environments, while exploring AI-assisted approaches to further optimize silicon development.

Qualifications

• Experience in ASIC methodology or EDA flows.
• Strong Python and Tcl scripting skills.
• Familiar with leading EDA tools from top vendors (Synopsys, Cadence, Siemens EDA).
• Experience supporting at least one production tapeout.

Responsibilities

• Develop and maintain EDA flows covering simulation, synthesis, lint, CDC, formal and power analysis.
• Build automation and productivity tools using Python, Tcl and CI/CD methodologies.
• Improve development infrastructure, regression environments and engineering workflows.
• Support the deployment and management of EDA tools and design environments.
• Help introduce AI-assisted approaches across design, verification and implementation workflows.
• Establish flow quality standards, sign-off criteria and engineering metrics.
• Work closely with engineers to support methodology adoption and resolve flow-related challenges.
• Drive continuous improvements to silicon project development and delivery.

Skills

ASIC methodology

EDA flows

Python scripting

Tcl scripting

Tapeout experience

EDA tools

Tools

Synopsys

Cadence

Siemens EDA

Job description

**All candidates must have the right to work on the Netherlands**

An exciting opportunity has arisen for a Senior/Staff Tool & Methodology Engineer to help shape the development infrastructure and engineering methodologies behind a new generation of advanced silicon products.

Working within a growing and highly technical engineering team, you will have a broad influence across the ASIC development flow, building the automation, EDA infrastructure and methodologies that enable engineers to develop, verify and deliver complex silicon efficiently. The role offers the opportunity to take ownership of key engineering infrastructure while helping define how the organisation approaches scalable silicon development.

The role will involve:

• Developing and maintaining EDA flows covering simulation, synthesis, lint, CDC, formal and power analysis
• Building automation and productivity tools using Python, Tcl and CI/CD methodologies
• Improving development infrastructure, regression environments and engineering workflows
• Supporting the deployment and management of EDA tools and design environments
• Helping introduce AI-assisted approaches across design, verification and implementation workflows
• Establishing flow quality standards, sign-off criteria and engineering metrics
• Working closely with engineers to support methodology adoption and resolve flow-related challenges
• Driving continuous improvements to the way silicon projects are developed and delivered

The ideal candidate will have:

• Strong commercial experience in ASIC methodology, EDA flows or a closely related area
• Excellent Python and Tcl scripting skills
• Experience working with leading EDA tools from vendors such as Synopsys, Cadence or Siemens EDA
• Good understanding of ASIC development flows including simulation, synthesis, lint and CDC
• Experience supporting at least one production tapeout