Senior/Staff Tools & Methodology Engineer

Intellectual Capital Resources Ltd; Noord-Brabant; On-site; EUR 90,000 - 130,000; Full time

Job summary

Intellectual Capital Resources Ltd. seeks a Senior/Staff Tool & Methodology Engineer to shape the development infrastructure and methodologies for advanced silicon products.

You will influence the ASIC flow, build automation, EDA infrastructure, and scalable silicon delivery in a growing, highly technical team. The role includes ownership of engineering infrastructure, defining how the organisation approaches scalable silicon development, and adopting AI-assisted workflows across design and

Qualifications

• Strong commercial experience in ASIC methodology, EDA flows or a related area.
• Excellent Python and Tcl scripting skills.
• Experience with leading EDA tools (Synopsys, Cadence, Siemens EDA).
• Solid understanding of ASIC flows including simulation, synthesis, lint and CDC.
• Strong Linux development experience and tapeout support.

Responsibilities

• Developing and maintaining EDA flows covering simulation, synthesis, lint, CDC, formal and power analysis.
• Building automation and productivity tools using Python, Tcl and CI/CD methodologies.
• Improving development infrastructure, regression environments and engineering workflows.
• Supporting deployment and management of EDA tools and design environments.
• Helping introduce AI-assisted approaches across design, verification and implementation workflows.
• Establishing flow quality standards, sign-off criteria and engineering metrics.
• Working with engineers to support methodology adoption and resolve flow-related challenges.
• Driving continuous improvements to silicon project development and delivery.

Skills

ASIC methodology experience

Python scripting

Tcl scripting

Linux development

Tools

Synopsys EDA tools

Cadence EDA tools

Siemens EDA tools

Job description

An exciting opportunity has arisen for a Senior/Staff Tool & Methodology Engineer to help shape the development infrastructure and engineering methodologies behind a new generation of advanced silicon products.

Working within a growing and highly technical engineering team, you will have a broad influence across the ASIC development flow, building the automation, EDA infrastructure and methodologies that enable engineers to develop, verify and deliver complex silicon efficiently. The role offers the opportunity to take ownership of key engineering infrastructure while helping define how the organisation approaches scalable silicon development.

The role will involve:

• Developing and maintaining EDA flows covering simulation, synthesis, lint, CDC, formal and power analysis
• Building automation and productivity tools using Python, Tcl and CI/CD methodologies
• Improving development infrastructure, regression environments and engineering workflows
• Supporting the deployment and management of EDA tools and design environments
• Helping introduce AI-assisted approaches across design, verification and implementation workflows
• Establishing flow quality standards, sign-off criteria and engineering metrics
• Working closely with engineers to support methodology adoption and resolve flow-related challenges
• Driving continuous improvements to the way silicon projects are developed and delivered

The ideal candidate will have:

• Strong commercial experience in ASIC methodology, EDA flows or a closely related area
• Excellent Python and Tcl scripting skills
• Experience working with leading EDA tools from vendors such as Synopsys, Cadence or Siemens EDA
• Good understanding of ASIC development flows including simulation, synthesis, lint and CDC
• Strong Linux development experience
• Experience supporting at least one production tapeout

All candidates must have the right to work in the Netherlands