Senior ASIC Methodology & Automation Engineer

IC Resources; Eindhoven; On-site; EUR 90,000 - 130,000; Full time

Job summary

IC Resources in Eindhoven is seeking a Senior/Staff Tool & Methodology Engineer to shape the development infrastructure behind next‑generation silicon products. You will own automation and EDA workflows across the ASIC flow, enabling efficient design, verification and delivery.

You will build Python and Tcl based tooling, improve regression environments and support deployment of design environments, while exploring AI-assisted approaches to further optimize silicon development.

Qualifications

• Experience in ASIC methodology or EDA flows.
• Strong Python and Tcl scripting skills.
• Familiar with leading EDA tools from top vendors (Synopsys, Cadence, Siemens EDA).
• Experience supporting at least one production tapeout.

Responsibilities

• Develop and maintain EDA flows covering simulation, synthesis, lint, CDC, formal and power analysis.
• Build automation and productivity tools using Python, Tcl and CI/CD methodologies.
• Improve development infrastructure, regression environments and engineering workflows.
• Support the deployment and management of EDA tools and design environments.
• Help introduce AI-assisted approaches across design, verification and implementation workflows.
• Establish flow quality standards, sign-off criteria and engineering metrics.
• Work closely with engineers to support methodology adoption and resolve flow-related challenges.
• Drive continuous improvements to silicon project development and delivery.

Skills

ASIC methodology

EDA flows

Python scripting

Tcl scripting

Tapeout experience

EDA tools

Tools

Synopsys

Cadence

Siemens EDA

Job description

IC Resources in Eindhoven is seeking a Senior/Staff Tool & Methodology Engineer to shape the development infrastructure behind next‑generation silicon products. You will own automation and EDA workflows across the ASIC flow, enabling efficient design, verification and delivery.

You will build Python and Tcl based tooling, improve regression environments and support deployment of design environments, while exploring AI-assisted approaches to further optimize silicon development.