Senior/Lead IC Package Design

UST; Seberang Perai; On-site; MYR 120,000 - 180,000; Full time

Job summary

UST in Malaysia seeks a Senior IC Package Design Engineer to craft advanced IC package layouts for flip-chip, wire bond, FCBGA, FCCSP, and SiP. You will conduct floorplanning, bump mapping, substrate routing, escape routing, and ball map design.

You will optimize designs for SI, PI, thermal performance and manufacturability, partnering with IC design, PCB, SI/PI, thermal and manufacturing teams through the lifecycle.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Microelectronics, or related field.
• 7+ years of IC package design experience.
• Strong knowledge of substrate design, bump planning, escape routing and stack-up design.
• Experience with SI, PI, thermal analysis and package reliability.

Responsibilities

• Design advanced IC package layouts for flip-chip, wire bond, FCBGA, FCCSP and SiP.
• Perform floorplanning, bump mapping, substrate routing, escape routing, and ball map design.
• Collaborate with IC design, PCB, SI/PI, thermal and manufacturing teams throughout the product cycle.
• Support package feasibility studies, design reviews, and DRC.
• Drive package design verification and resolve package-related issues.
• Document design methodologies and best practices.

Skills

Floorplanning

Bump mapping

Substrate routing

Escape routing

Ball map design

SI/PI analysis

Thermal analysis

Design for manufacturability

Education

Electrical/Electronics/Microelectronics degree

Job description

• Design and develop advanced IC package layouts for flip-chip, wire bond, FCBGA, FCCSP, and SiP packages.
• Perform package floorplanning, bump mapping, substrate routing, escape routing, and ball map design.
• Optimize package designs for signal integrity (SI), power integrity (PI), thermal performance, and manufacturability.
• Work closely with IC design, physical design, PCB, SI/PI, thermal, and manufacturing teams throughout the product development cycle.
• Support package feasibility studies, design reviews, and design rule checks (DRC).
• Drive package design verification and resolve package-related design issues.
• Collaborate with OSATs and substrate vendors during package development and qualification.
• Support package bring-up, characterization, and production ramp activities.
• Document design methodologies, best practices, and technical solutions.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Microelectronics, or a related field.
• 7+ years of experience in IC Package Design.
• Strong understanding of substrate design, bump planning, escape routing, stack-up design, and package assembly processes.
• Knowledge of signal integrity (SI), power integrity (PI), thermal analysis, and package reliability.