Senior Analog Layout Design Engineer

UST; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

UST in Bayan Lepas, Penang, Malaysia, seeks a Senior Layout Engineer to lead analog/mixed-signal IC layout projects and drive high-quality layouts from concept to delivery.

You will mentor junior layout engineers, collaborate with circuit designers, and ensure adherence to DRC/LVS and foundry rules to achieve robust, manufacturable designs.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 7+ years of experience in analog/mixed-signal IC layout design.
• Expert proficiency with industry-standard EDA tools (Cadence Virtuoso, Mentor Graphics).
• Deep understanding of transistor level and analog circuit topologies and their layout sensitivities (matching, parasitics, noise, shielding, etc.).
• Strong problem-solving skills and attention to detail.
• Excellent communication skills and ability to work collaboratively in a cross-functional environment.
• Experience mentoring and leading layout teams is a plus.

Responsibilities

• Lead and execute layout design of digital. analog and mixed-signal circuit.
• Collaborate closely with circuit designers to understand requirements, constraints, and performance targets.
• Plan and manage layout schedules, resources, and deliverables, ensuring timely completion of projects.
• Perform floorplanning, placement, and routing while optimizing for area, performance, and manufacturability.
• Conduct thorough physical verification such as DRC, LVS, ERC including RV.
• Drive design reviews and provide technical mentorship to junior layout engineers.
• Interface with foundry partners to ensure compliance with process design rules and manufacturing best practices.
• Document design methodology and maintain layout guidelines for future projects.

Skills

Problem-solving

Attention to detail

Communication

Education

Bachelor’s or Master’s in Electrical Engineering or Microelectronics

Tools

Cadence Virtuoso

Mentor Graphics

Job description

Key Responsibilities

• Lead and execute layout design of digital. analog and mixed-signal circuit.


• Collaborate closely with circuit designers to understand requirements, constraints, and performance targets.


• Plan and manage layout schedules, resources, and deliverables, ensuring timely completion of projects.


• Perform floorplanning, placement, and routing while optimizing for area, performance, and manufacturability.


• Conduct thorough physical verification such as DRC, LVS, ERC including RV.


• Drive design reviews and provide technical mentorship to junior layout engineers.


• Interface with foundry partners to ensure compliance with process design rules and manufacturing best practices.


• Document design methodology and maintain layout guidelines for future projects.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.


• 7+ years of experience in analog/mixed-signal IC layout design.


• Expert proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics).


• Deep understanding of transistor level and analog circuit topologies and their layout sensitivities (matching, parasitics, noise, shielding, etc.).


• Strong problem-solving skills and attention to detail.


• Excellent communication skills and ability to work collaboratively in a cross-functional environment.


• Experience mentoring and leading layout teams is a plus.