Analog Layout / Mask Design Engineer (Senior)

UST Malaysia; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

UST Malaysia in Penang (Bayan Lepas) is seeking an experienced layout engineer to lead analog and mixed-signal IC layout projects. You will collaborate with circuit designers, plan schedules, and drive layout deliverables from floorplanning through routing while ensuring manufacturability.

The ideal candidate holds a Bachelor’s or Master’s in Electrical Engineering or Microelectronics, has 8+ years in analog/mixed-signal IC layout, and is proficient with Cadence Virtuoso and Mentor Graphics.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 8+ years of experience in analog/mixed-signal IC layout design.
• Expert proficiency with industry-standard EDA tools (Cadence Virtuoso, Mentor Graphics).
• Strong understanding of layout sensitivities (matching, parasitics, noise, shielding).

Responsibilities

• Lead and execute layout design of digital, analog and mixed-signal ICs.
• Collaborate closely with circuit designers to understand requirements and targets.
• Plan and manage layout schedules, resources, and deliverables.
• Perform floorplanning, placement and routing while optimizing for manufacturability.
• Conduct DRC, LVS, ERC including RV and drive design reviews.

Skills

Analog IC layout

Mixed-signal layout

Floorplanning & routing

Education

Bachelor’s or Master’s degree in Electrical Engineering/Microelectronics

Tools

Cadence Virtuoso

Mentor Graphics

Job description

• Lead and execute layout design of digital, analog and mixed-signal circuit.
• Collaborate closely with circuit designers to understand requirements, constraints, and performance targets.
• Plan and manage layout schedules, resources, and deliverables, ensuring timely completion of projects.
• Perform floorplanning, placement, and routing while optimizing for area, performance, and manufacturability.
• Conduct thorough physical verification such as DRC, LVS, ERC including RV.
• Drive design reviews and provide technical mentorship to junior layout engineers.
• Interface with foundry partners to ensure compliance with process design rules and manufacturing best practices.
• Document design methodology and maintain layout guidelines for future projects.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• At least 8 years of experience in analog/mixed-signal IC layout design.
• Expert proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics).
• Deep understanding of transistor level and analog circuit topologies and their layout sensitivities (matching, parasitics, noise, shielding, etc.).
• Strong problem-solving skills and attention to detail.
• Excellent communication skills and ability to work collaboratively in a cross-functional environment.
• Experience mentoring and leading layout teams is a plus.