Senior 3D IC Engineer — Tapeout & Stack Lead

Bitdeer (NASDAQ: BTDR); Seberang Perai; On-site; MYR 250,000 - 450,000; Full time

Job summary

Bitdeer is seeking a senior 3DIC/advanced-packaging engineer to own the WoW stack definition and TSV/HB interfaces, coordinating with foundries and memory partners. The role encompasses 3D floorplanning, DFM/rule definitions, and cross-functional signoff through tapeout.

You will coordinate thermal/thermo-mechanical analyses, drive 3D test strategies, and lead package/substrate co-design handoffs to OSAT, ensuring milestones are met and risks mitigated.

Qualifications

• BS/MS/PhD in EE, Materials, Mechanical Engineering, or a related field.
• 5+ years in 3DIC / advanced-packaging / process integration, with at least one product taken to tapeout and through assembly.
• Direct, hands-on experience with TSV and hybrid bonding and a 3D stacking flow.
• Working knowledge of TSMC 3DFabric (SoIC / CoWoS / InFO) or an equivalent foundry 3D ecosystem, including the associated design kits and rule decks.
• Solid grasp of thermal / thermal-mechanical behavior in stacked die and of SI/PI at the die-to-die interface.
• Comfortable owning cross-organization interfaces - foundry, memory IP partner, and OSAT - and translating their constraints into actionable design inputs

Responsibilities

• Own the WoW stack definition and the TSV / HB interface with the foundry and memory partner.
• Drive 3D-aware floorplan inputs and tie-ins with Physical Design teams.
• Define and close DFM and 3D design rules; review process assumptions.
• Coordinate thermal and thermo-mechanical analysis and feed mitigations into stack choices.
• Drive 3D signoff: thermal, SI/PI across die-to-die interface, and known-good-stack assumptions.
• Work with DFT on 3D test strategy for stacked-die tests.
• Manage package / substrate co-design handoff to OSAT: stackup, escape, assembly flow, and yield considerations.
• Track foundry and memory-partner deliverables and surface integration risks.

Skills

3DIC experience

Tapeout to assembly

TSV & hybrid bonding

Thermal stress

Cross-org collaboration

Education

BS/MS/PhD in EE

Tools

Ansys

Synopsys

Cadence

Job description

Bitdeer is seeking a senior 3DIC/advanced-packaging engineer to own the WoW stack definition and TSV/HB interfaces, coordinating with foundries and memory partners. The role encompasses 3D floorplanning, DFM/rule definitions, and cross-functional signoff through tapeout.

You will coordinate thermal/thermo-mechanical analyses, drive 3D test strategies, and lead package/substrate co-design handoffs to OSAT, ensuring milestones are met and risks mitigated.