Lead Advanced Packaging Design Engineer

Pride Global; Seberang Perai; On-site; MYR 180,000 - 260,000; Full time

Job summary

Pride Global seeks an experienced Lead Advanced Packaging Design Engineer to drive the development and integration of next-generation semiconductor packaging technologies, focusing on 2.5D/3D IC integration and heterogeneous architectures.

You will lead cross-functional teams across design, DFT, SI/PI, thermal, and manufacturing, shaping long-term technology strategies and ensuring manufacturability, reliability, and scalability of complex packaging programs.

Qualifications

• Master's or PhD in Electrical Engineering, Materials Science, Electronics Engineering, or related technical discipline.
• Minimum 10 years in semiconductor packaging design and development with 5+ years in advanced packaging tech.

Responsibilities

• Lead architecture, design, and development of advanced packaging solutions (FOWLP, 2.5D/3D, CoWoS, EMIB).
• Establish design rules and workflows for multi-die integration and high-density interconnects.
• Collaborate with silicon design, DFT, SI/PI, thermal, mechanical, and manufacturing teams to optimize packaging.
• Drive technology roadmaps for heterogeneous integration and chiplet-based systems.
• Provide technical leadership and mentoring to engineers; ensure on-time, within-budget delivery.

Skills

Advanced packaging design

2.5D/3D IC integration

FOWLP/CoWoS/EMIB

Cross-functional leadership

Education

Master's or PhD in Electrical Engineering or related field

Tools

Cadence Allegro

Siemens EDA Xpedition

Ansys simulation

Job description

Employment type : Open to Perm & Contract

Working arrangement : Onsite

Salary Range : 15-20% Increment

Position Overview

We are seeking an experienced Lead Advanced Packaging Design Engineer to spearhead the development, design, and integration of next-generation semiconductor packaging technologies. This role will focus on 2.5D and 3D IC integration, heterogeneous integration, chiplet-based architectures, and advanced substrate design, with an emphasis on performance optimization, manufacturability, reliability, and scalability.

The successful candidate will bring extensive technical expertise in advanced semiconductor packaging, coupled with strong leadership capabilities to drive cross-functional collaboration, deliver complex packaging programs, and shape long-term technology strategies.

Key Responsibilities

1. Technology Leadership

• Lead the architecture, design, and development of advanced packaging solutions, including FOWLP, 2.5D/3D IC integration, CoWoS, EMIB, and hybrid bonding technologies.
• Establish design rules, methodologies, and workflows for multi-die integration, high-density interconnects, and advanced packaging architectures.
• Evaluate emerging packaging technologies and develop innovative solutions to address performance, reliability, and manufacturability challenges.

2. Cross-Functional Collaboration

• Collaborate with silicon design, design-for-test (DFT), signal integrity (SI), power integrity (PI), thermal, mechanical, and manufacturing teams to deliver optimized packaging solutions.
• Work closely with OSAT partners, substrate suppliers, foundries, and EDA vendors to ensure design compatibility, process readiness, and manufacturing feasibility.
• Drive technical alignment across multidisciplinary teams to resolve complex design and integration challenges.

3. Design Execution and Delivery

• Lead the complete package design lifecycle, from concept development and feasibility assessment through physical layout, verification, and tape-out.
• Ensure package designs meet electrical, thermal, mechanical, reliability, cost, and yield requirements.
• Oversee design reviews, risk assessments, verification activities, and manufacturing readiness to ensure successful program execution.
• Identify and resolve design issues while maintaining project schedules, quality standards, and production targets.

4. Innovation and Technology Roadmap

• Drive the evaluation and adoption of emerging packaging technologies, advanced materials, and high-density interconnect solutions.
• Contribute to long-term technology roadmaps for heterogeneous integration, chiplet-based systems, and next-generation semiconductor packaging.
• Identify opportunities to improve packaging performance, reduce manufacturing costs, enhance yield, and increase design efficiency.

5. Team Leadership and Development

• Provide technical leadership, mentorship, and guidance to engineers working on advanced packaging design and integration.
• Establish design standards, engineering best practices, and reusable methodologies to improve team productivity and design quality.
• Promote knowledge sharing, continuous improvement, and technical excellence across the organization.
• Communicate technical strategies, project status, risks, and recommendations to senior management and executive stakeholders.

Qualifications

1. Education

• Master's or Ph.D. degree in Electrical Engineering, Materials Science, Electronics Engineering, or a related technical discipline.

2. Professional Experience

• Minimum of 10 years of experience in semiconductor packaging design and development, including at least 5 years in advanced packaging technologies such as 2.5D/3D integration, FOWLP, CoWoS, or EMIB.
• Demonstrated experience leading complex multi-die packaging projects from initial concept through production.
• Proven ability to manage technical challenges, coordinate cross-functional teams, and deliver packaging solutions that meet performance, quality, cost, and schedule objectives.

3. Technical Expertise

• Strong expertise in advanced substrate design, silicon interposers, through-silicon vias (TSVs), redistribution layers (RDL), and hybrid bonding technologies.
• Proficiency in semiconductor packaging design and EDA tools, such as Cadence Allegro, Siemens EDA Xpedition, and Ansys simulation platforms.
• Solid understanding of signal integrity, power integrity, thermal management, mechanical stress, and package reliability.
• Familiarity with design-for-test (DFT), design-rule verification, electrical modeling, and semiconductor packaging qualification processes.
• Experience with package-level verification, manufacturability assessment, and production yield optimization.

4. Leadership and Communication

• Demonstrated ability to lead multidisciplinary engineering teams and influence technical decisions at both engineering and executive levels.
• Strong project management, problem-solving, communication, and stakeholder management skills.
• Ability to translate complex technical requirements into practical design strategies and executable development plans.
• Strong focus on accountability, collaboration, continuous improvement, and timely delivery.

Preferred Attributes

• Hands-on experience with chiplet-based architectures, heterogeneous integration, and high-performance computing or AI semiconductor packaging.
• Familiarity with supply chain management, foundry ecosystems, OSAT operations, and advanced substrate manufacturing.
• Experience collaborating with EDA vendors and manufacturing partners to develop or optimize advanced packaging design flows.
• Contributions to industry standards or technical working groups, including IEEE, JEDEC, or IPC.
• A track record of technical publications, patents, or innovations in semiconductor packaging and integration technologies.