Senior SoC Integration Engineer - RISC Processor Lead

Bitdeer (NASDAQ: BTDR); Penang; On-site; MYR 180,000 - 240,000; Full time

Job summary

Bitdeer seeks an experienced SoC Design Engineer to develop next‑generation System‑on‑Chip solutions. You will implement RISC processors, configure subsystems, manage memory architecture, and integrate IP cores into complex platforms.

The role requires collaboration with architecture, RTL, verification, software, and physical design teams throughout the development lifecycle and a strong background in RTL and AMBA protocols.

Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Engineering.
• 5+ years of SoC design or processor integration experience.
• Experience with RISC-V or Arm processor integration into SoCs.
• Strong RTL design skills using Verilog/SystemVerilog.
• Experience with AMBA protocols (AXI4, AHB, APB).
• Familiarity with boot flow, firmware interaction, and NoC/DMA concepts.

Responsibilities

• Configure and integrate RISC processor IP (RISC-V or Arm) into SoC platforms.
• Customize processor features (cache, MMU/MPU, PMP, debug, interrupt controller).
• Integrate processor subsystems with AXI/AHB/APB interconnects and interrupt controllers.
• Develop RTL integration logic, wrappers, and system glue logic.
• Collaborate with verification teams to develop test plans and debug issues.
• Work with firmware and software teams to enable bootloader and OS bring‑up.
• Analyze and resolve system‑level performance, power, and integration issues.
• Review third‑party IP docs and coordinate IP integration.

Skills

SoC integration

RISC-V/Arm

RTL design

Verilog/SystemVerilog

AMBA protocols

debugging

Cross-functional collab

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

VCS

Xcelium

Questa

Verdi

Job description

Bitdeer seeks an experienced SoC Design Engineer to develop next‑generation System‑on‑Chip solutions. You will implement RISC processors, configure subsystems, manage memory architecture, and integrate IP cores into complex platforms.

The role requires collaboration with architecture, RTL, verification, software, and physical design teams throughout the development lifecycle and a strong background in RTL and AMBA protocols.