Staff / Principal Advanced Packaging Engineer

Bitdeer; Malaysia; On-site; MYR 180,000 - 240,000; Full time

Benefits offered by this job

Competitive welfare benefits

Training and mentoring

Autonomy and fast growth

Job summary

Bitdeer is seeking a Staff / Principal Advanced Packaging Engineer to lead packaging architecture, technology strategy, and high-volume manufacturing execution for next-generation HPC silicon. This is a high-impact, hands-on technical leadership role responsible for driving advanced packaging from concept through mass production.

You will define the company’s packaging roadmap, lead cross-functional chip-package-board co-design, and ensure scalable, reliable production for large-die, high-power

Qualifications

• Bachelor's degree or above in Microelectronics or related field.
• 8+ years in advanced semiconductor packaging or related experience.
• Experience bringing complex semiconductor products from concept to high-volume production.
• Hands-on with high-layer-count FCBGA packaging technologies.
• Expert-level substrate layout review using Cadence APD/Allegro or equivalent.
• Strong SI/PI knowledge for high-performance devices.
• Understanding of thermal/mechanical challenges in packaging, warpage management.
• Familiarity with JEDEC reliability and failure analysis techniques.
• Excellent communication and cross-functional collaboration.

Responsibilities

• Define packaging architecture and technology strategy for HPC silicon.
• Lead cross-functional chip-package-board co-design with silicon and hardware teams.
• Govern packaging programs, establish design rules, schedules, and quality standards.
• Oversee NPI, mass production, and supplier engagement to mitigate risks.

Skills

Packaging architecture

Technology strategy

NPI leadership

SI/PI analysis

Thermal & mechanical design

Vendor management

Cross-functional leadership

High-volume manufacturing

Education

Bachelor's degree in Microelectronics / Semiconductor Engineering

Tools

Cadence APD

Allegro

Ansys

Flotherm

Job description

About Bitdeer:

Bitdeer is a world-leading technology company for Bitcoin mining and AI cloud. Bitdeer is committed to providing comprehensive Bitcoin mining solutions for its customers. Apart from designing industry-leading ASIC chips and manufacturing mining rigs, the Group handles complex processes involved in computing across the value chain. This includes equipment procurement, transport logistics, datacenter design and construction, equipment management, and network and facility operations. Bitdeer also offers advanced cloud capabilities to customers with a high demand for artificial intelligence. Headquartered in Singapore, Bitdeer operates globally with a diversified 3 GW energy portfolio, and deploys Bitcoin mining and HPC datacenters in the United States, Bhutan, Norway, Canada, Malaysia, and Ethiopia.

Job Summary:

We are seeking a Staff / Principal Advanced Packaging Engineer to lead packaging architecture, technology strategy, and high-volume manufacturing execution for next-generation HPC silicon.

This is a high-impact, hands-on technical leadership role responsible for driving advanced packaging from concept through mass production. You will define the company’s packaging roadmap, lead cross-functional chip-package-board co-design, and ensure scalable, reliable production for large-die, high-power devices.

What you will be responsible for:

1. Packaging Architecture & Technology Strategy

• Serve as the company's technical authority on advanced semiconductor packaging.
• Define packaging architecture and select optimal technologies for high-performance semiconductor products and advanced computing applications.
• Evaluate and optimize PPAC (Performance, Power, Area, Cost) trade-offs across advanced packaging solutions such as high-layer-count FCBGA, packaging architectures, and other advanced package technologies.
• Lead system-level Chip–Package–Board co-design in close collaboration with silicon and hardware teams.

2. Technical Governance & Outsourcing Management

• Lead technical engagement with internal stakeholders, external packaging design houses, and substrate suppliers.
• Establish design rules, review processes, project schedules, and quality standards for package development.
• Perform technical reviews and sign-off for substrate layouts, DRC/DFM compliance, and critical design milestones.
• Collaborate with suppliers to assess process capabilities, manufacturability, and technology roadmaps while mitigating technical and schedule risks.

3. SI/PI, Thermal & Mechanical Excellence

• Lead package-level Signal Integrity (SI) and Power Integrity (PI) reviews for high-speed interfaces such as PCIe, SerDes, DDR/HBM memory interfaces, and other advanced interconnect technologies.
• Review and validate electromagnetic simulation results to ensure compliance with electrical performance targets.
• Drive thermal architecture and mechanical reliability strategies for advanced semiconductor packages.
• Oversee warpage, stress, thermal, and reliability modelling (e.g. Ansys, Flotherm) to minimize packaging risks and ensure long-term product reliability.

4. NPI, Supply Chain & Mass Production Leadership

• Lead packaging execution through New Product Introduction (NPI) into high-volume manufacturing.
• Resolve technical issues throughout the packaging process, including bumping, assembly, molding, and package integration.
• Drive root cause analysis and resolution of manufacturing challenges, including yield improvement, solder defects, bonding issues, and reliability concerns.
• Define reliability qualification strategies and lead failure analysis (FA) using industry-standard methodologies.

How you will stand out:

• Bachelor's degree or above in Microelectronics, Semiconductor Engineering, Electronic & Electrical Engineering, or a related discipline.
• 8+ years of experience in advanced semiconductor packaging, package architecture, design, or process engineering.
• Proven experience bringing complex semiconductor products (e.g. SoC, ASIC, networking, storage, or high-performance computing devices) from concept through high-volume production.
• Strong hands‑on experience with high-layer-count FCBGA; experience with packaging technologies is highly preferred.
• Expert‑level substrate layout review capability using Cadence APD, Allegro, or equivalent tools.
• Deep knowledge of SI/PI analysis for high-performance semiconductor devices and high-speed interfaces.
• Good understanding of thermal and mechanical challenges in advanced packaging, including warpage mitigation and stress management.
• Familiarity with JEDEC reliability standards and failure analysis techniques such as SAT, X‑ray, FIB, and SEM.
• Excellent communication and cross‑functional collaboration skills.
• Proven ability to manage and influence external vendors through technical leadership.
• Self‑driven, accountable, and capable of leading complex packaging programs independently from development through production.

What you will experience working with us:

• A culture that values authenticity and diversity of thoughts and backgrounds;
• An inclusive and respectable environment with open workspaces and exciting start‑up spirit;
• Fast‑growing company with the chance to network with industrial pioneers and enthusiasts;
• Ability to contribute directly and make an impact on the future of the digital asset industry;
• Involvement in new projects, developing processes/systems;
• Personal accountability, autonomy, fast growth, and learning opportunities;
• Attractive welfare benefits and developmental opportunities such as training and mentoring.