Physical Design Engineer

HCLTech; Penang; On-site; MYR 180,000 - 300,000; Full time

Job summary

HCLTech in Penang, Malaysia is seeking a senior physical design engineer to drive end-to-end flow from floorplanning to signoff, across 7nm and below nodes, ensuring timing closure across modes and corners.

You will perform power planning, placement, CTS, routing, and signoff, resolve DRC/LVS/ERC issues, and collaborate with RTL, micro-architecture, DFT/Test, foundry and CAD teams to optimize flows and automate design methodologies.

Responsibilities

• Perform floorplanning, power planning, placement and optimization
• Execute CTS and routing to meet timing closure across modes and corners
• Resolve DRC, LVS and signoff violations
• Apply low power techniques including multi-Vt and multi-voltage (UPF)
• Perform physical verification and signoff (STA, SI, Crosstalk, IR drop, EM)
• Work on advanced nodes (7nm, 5nm, 3nm or below)
• Collaborate with RTL, micro-architecture, DFT/Test, foundry and CAD teams
• Debug timing, congestion, power, and variability issues
• Drive methodology improvements and automation (scripts/flows)

Job description

Perform end to end physical design flow:

• Floorplanning
• Power planning (PG grid, IR)
• Placement & optimization
• CTS (Clock Tree Synthesis)
• Routing
• Post route optimization
• Achieve timing closure across all modes and corners
• Resolve DRC, LVS, ERC and signoff violations
• Handle low power design techniques:
  • Multi Vt, Multi voltage (UPF)
  • Power gating, clock gating
• Perform physical verification and signoff:
  • STA (Primetime)
  • SI / Crosstalk
  • IR drop & EM analysis
• Work on advanced nodes (7nm, 5nm, 3nm or below)
• Collaborate with:
  • RTL & Micro architecture teams
  • DFT & Test engineers
  • Foundry and CAD teams
• Debug complex timing, congestion, power, and variability issues
• Drive methodology improvements and automation (scripts/flows)