Packaging development engineer

NXP Semiconductors NV; Kuala Lumpur; On-site; MYR 120,000 - 180,000; Full time

Job summary

NXP Semiconductors NV seeks a Senior Flip-Chip Front-End Packaging Development Engineer – Die Attach & Underfill to lead FC-FE die attach and underfill process development, optimization, and integration. You will drive DOE studies, troubleshoot defects, and coordinate with cross-functional teams to improve yield, reliability, and readiness for production.

You will own process parameters, collaborate on new package platforms, and mentor staff while advancing NPI readiness and process

Qualifications

• Bachelor’s degree in Mechanical Engineering, Materials Science, Chemical Engineering, or a related discipline.
• Minimum of five years in semiconductor packaging, with FC-FE die attach and underfill exposure.
• Hands-on experience with DOE, 8D, Fishbone, 5-Why, and FTA.
• Experience in high‑volume manufacturing and fast-paced development.
• Knowledge of process controls, CSAM, and reliability testing.

Responsibilities

• Take ownership of FC-FE die attach and underfill processes across advanced packages.
• Define and optimize process parameters for die placement, bonding, reflow, and underfill dispensing.
• Lead DOE activities to improve yield, reliability, void control, and CSAM performance.
• Drive root-cause analysis and implement corrective actions for yield excursions.
• Collaborate with cross-functional teams to ensure robust process integration and readiness.

Skills

DOE

Troubleshooting

Yield improvement

Process characterization

Data‑driven decision making

Education

Bachelor’s degree in Mechanical Engineering

Tools

AI‑based simulation tools

Job description

The Senior Flip-Chip Front-End Packaging Development Engineer – Die Attach & Underfill is responsible for leading FC-FE process development, optimization, and integration activities for die attach and underfill process. This role requires strong technical capability in process characterization, DOE, troubleshooting, yield improvement, material qualification, and equipment readiness to support packages development and production release. The engineer will work closely with cross-functional teams to ensure robust process performance, manufacturability, reliability, and continuous improvement across flip‑chip packaging platforms.

Process Ownership & Optimization

• Take ownership of FC-FE die attach and underfill processes for semiconductor packages, including advanced package platforms.
• Define, develop, optimize, and maintain critical process parameters for die placement, bonding, reflow, underfill dispensing, cure, CSAM, and related process controls.
• Lead design of experiments (DOE) activities to improve process yield, product reliability, void control, fillet quality, underfill flow, curing profile, and CSAM performance.
• Diagnose and resolve complex front-end process defects through systematic analysis and data‑driven decision‑making.

Advanced Troubleshooting & Yield Improvement

• Drive root cause analysis for yield excursions using structured problem‑solving methodologies, including 8D, Fishbone, 5-Why, and FTA.
• Develop and implement corrective and preventive actions to sustain yield improvement and prevent recurrence.
• Monitor yield performance and initiate continuous improvement projects to enhance process capability.
• Analyze inline process data and reliability results to identify potential process risks and improvement opportunities.

Tooling & Equipment Management

• Lead tooling, fixture, and dispense process improvements in collaboration with vendors to support first‑time NPI‑development requirements.
• Support die attach and underfill, CSAM equipment qualification, calibration, upgrades, and readiness for production deployment.

New Product Leadership

• Lead process development activities for new packages from concept phase through production release.
• Conduct technology research, process characterization, and process window development to support NPI readiness.
• Collaborate with the design engineering team to define and validate Design for Manufacturability (DFM) requirements.
• Prepare and maintain process documentation, including specifications, work instructions, control plans, and related technical records.

Material & Process Integration

• Evaluate and qualify FC-FE‑related materials, including die attach materials, flux, underfill, and associated consumables to support process performance, manufacturability, and reliability requirements.
• Work closely with supplies to address material‑related issues, drive improvements, and support qualification activities.
• Access interactions among die attach process design, underfill material properties, curing conditions, CSAM results, package structure, and reliability performance to ensure robust process integration.
• Establish underfill inspection and acceptance criteria, including CSAM verification for voids, delamination, non‑wet, flow coverage, and cure‑related defects.
• Experience or familiarity with AI‑based simulation tools will be considered an advantage.

Cross‑Functional & Leadership Role

• Serve as the technical lead across operations, quality, product engineering, suppliers, and subcontractors to ensure process alignment and performance.
• Mentor junior engineers and technicians in process development, equipment troubleshooting, and structured problem‑solving.
• Provide proactive technical support for failure analysis reviews, risk assessments, and cross‑functional technical discussions.

Qualifications Education

• Bachelor’s degree in Mechanical Engineering, Materials Science, Chemical Engineering, or a related discipline.

Experience

• Minimum of five years of experience in semiconductor packaging, with strong exposure to FC-FE die attach, and underfill dispensing processes. Familiarity with the end‑to‑end flip‑chip process flow will be considered an advantage.
• Demonstrated hands‑on experience in high‑volume manufacturing and fast‑paced development environments.