Lead FPGA Modeling Engineer

Lattice Semiconductor Corp.; Malaysia; On-site; MYR 180,000 - 300,000; Full time

Job summary

Lattice Semiconductor Corp. in Malaysia seeks a Lead Modeling Design Engineer to oversee and contribute to the creation and validation of models for FPGAs, ensuring accuracy and performance.

You will lead a team of engineers, collaborate with cross‑functional design teams and internal customers to meet model requirements, while driving high‑quality modeling across analog, digital, and mixed‑signal circuits.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering with 10+ years of experience.
• Proficiency in circuit modeling and simulation.
• Experience with SPICE, Verilog, VHDL, System Verilog.
• Strong leadership and team management skills.
• Excellent analytical and problem‑solving abilities.
• Excellent communication and collaboration skills.
• Experience with data analysis and visualization tools is a plus.
• Knowledge of semiconductor devices and circuit design principles is preferred.

Responsibilities

• Lead development and validation of models for analog, digital, and mixed‑signal circuits.
• Utilize simulation tools such as SPICE, Verilog, SystemVerilog, or similar, to perform digital circuit analysis.
• Provide technical leadership and mentorship to a team of circuit modeling engineers.
• Collaborate with design engineers to understand circuit requirements and specifications.
• Collaborate with internal customers/consumers of the models to assure their needs are comprehended and objectives are met.
• Analyze simulation results and provide feedback to improve circuit designs.
• Optimize circuit models for performance, accuracy, and efficiency.
• Document modeling processes, assumptions, and results for internal and external stakeholders.
• Stay updated with the latest advancements in circuit modeling techniques and tools.

Skills

Leadership

Analytical thinking

Communication

Collaboration

Mentorship

Education

Electrical Engineering degree

Tools

SPICE

Verilog

VHDL

SystemVerilog

Job description

Lattice Semiconductor Corp. in Malaysia seeks a Lead Modeling Design Engineer to oversee and contribute to the creation and validation of models for FPGAs, ensuring accuracy and performance.

You will lead a team of engineers, collaborate with cross‑functional design teams and internal customers to meet model requirements, while driving high‑quality modeling across analog, digital, and mixed‑signal circuits.