Senior Staff FPGA Interface Architect

Lattice Semiconductor; Malaysia; Hybrid; MYR 180,000 - 250,000; Full time

Job summary

Lattice Semiconductor seeks a Senior Staff Engineer in Malaysia to lead RTL development, integration, and productization of high-speed interfaces (PCIe, Ethernet, USB, MIPI) for next-generation FPGA products. You will own subsystems, drive verification, and coordinate across digital, PHY, and software teams.

You will mentor engineers, manage complex debug, silicon bring-up, and pre/post-silicon validation while influencing architecture and design quality across programs.

Qualifications

• 15+ years of ASIC, SoC, or FPGA design experience and product development.
• Strong RTL design and subsystem integration experience.
• Experience with high-speed interfaces like PCIe, Ethernet, USB, MIPI or SerDes.

Responsibilities

• Lead architecture, RTL development, integration, verification, and productization of high-speed interfaces.
• Own subsystem requirements across digital logic, PHY, soft IP, firmware, and validation.
• Drive root-cause analysis for pre- and post-silicon issues and customer-reported problems.
• Collaborate with software/firmware teams on configuration, feature enablement, and user flows.
• Mentor engineers and improve design and release methodologies.

Skills

RTL design

PCIe

Ethernet

MIPI

SerDes

FPGA design

silicon bring-up

system verification

debug/diagnostics

mentoring

Education

Bachelor's or Master's degree in Electrical/ Electronics/ Computer Engineering

Tools

SystemVerilog

Emulation

FPGA prototyping

DFT/DFD tooling

Job description

Lattice Semiconductor seeks a Senior Staff Engineer in Malaysia to lead RTL development, integration, and productization of high-speed interfaces (PCIe, Ethernet, USB, MIPI) for next-generation FPGA products. You will own subsystems, drive verification, and coordinate across digital, PHY, and software teams.

You will mentor engineers, manage complex debug, silicon bring-up, and pre/post-silicon validation while influencing architecture and design quality across programs.