Emulation Verification Engineer - SoC/FPGA Focus

UST Malaysia

Bayan Lepas

On-site

MYR 90,000 - 130,000

Full time

9 days ago

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

UST Malaysia in Bayan Lepas, Penang, is seeking an experienced Design Verification Engineer to verify SoC/IP designs and ensure their correctness. You will develop verification plans, perform simulations, and debug complex issues, collaborating with RTL teams to drive quality.

The role requires strong SystemVerilog/UVM skills, DV methodologies, and hands-on Emulation or FPGA experience, plus proficiency in C/C++ programming. A relevant Bachelor's or Master's degree is required.

Qualifications

  • 4+ years of experience in Design Verification.
  • Bachelor's/Master's degree in Electrical/Electronic or Computer Engineering.
  • Strong experience in SystemVerilog/UVM and DV methodologies.
  • Hands-on experience with Emulation or FPGA is preferred.
  • Proficiency in C/C++ programming.
  • Experience with SoC/IP verification, debugging, and simulation tools.

Responsibilities

  • Develop and execute verification plans for SoC/IP designs.
  • Perform simulation, debugging, and functional verification.
  • Support Emulation/FPGA-based verification.
  • Write and debug C/C++ test code.
  • Work closely with RTL/design teams to identify and resolve issues.

Skills

SystemVerilog/UVM
DV methodologies
C/C++ programming
Emulation/FPGA-based verification
SoC/IP verification
Debugging
Simulation tools

Education

Bachelor's/Master's degree in Electrical/Electronic Engineering, Computer Engineering, or related field

Tools

Simulation tools

Job description

UST Malaysia in Bayan Lepas, Penang, is seeking an experienced Design Verification Engineer to verify SoC/IP designs and ensure their correctness. You will develop verification plans, perform simulations, and debug complex issues, collaborating with RTL teams to drive quality.

The role requires strong SystemVerilog/UVM skills, DV methodologies, and hands-on Emulation or FPGA experience, plus proficiency in C/C++ programming. A relevant Bachelor's or Master's degree is required.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

ASIC/SoC Verification & Emulation Engineer
ASIC/SoC Verification & Emulation Engineer

UST • Penang

On-site
MYR 90,000 - 180,000
Design Verification Emulation Engineer
Design Verification Emulation Engineer

UST • Penang

On-site
MYR 90,000 - 180,000
Design Verification Engineer
Design Verification Engineer

XINPAL (MALAYSIA) SDN. BHD. • Bayan Lepas

On-site
MYR 70,000 - 110,000
Emulation Engineer - Palladium/ZeBu SoC Validation
Emulation Engineer - Palladium/ZeBu SoC Validation

UST • Penang

On-site
MYR 120,000 - 210,000
Senior FPGA Verification Engineer - DFT/UVM for SoC
Senior FPGA Verification Engineer - DFT/UVM for SoC

Altera • Bayan Lepas

On-site
MYR 120,000 - 180,000
SoC DFX Emulation Verification Engineer
SoC DFX Emulation Verification Engineer

UST • Penang

On-site
MYR 70,000 - 110,000
Emulation Engineer
Emulation Engineer

UST Malaysia • Bayan Lepas

On-site
MYR 90,000 - 130,000
SoC/AI-SoC Verification Engineer (UVM/SystemVerilog)
SoC/AI-SoC Verification Engineer (UVM/SystemVerilog)

XINPAL (MALAYSIA) SDN. BHD. • Bayan Lepas

On-site
MYR 70,000 - 110,000
SoC DFX DV Engineer - Emulation & Debug Expert
SoC DFX DV Engineer - Emulation & Debug Expert

UST • Penang

On-site
MYR 90,000 - 130,000
FPGA Silicon Design Verification Engineer
FPGA Silicon Design Verification Engineer

Altera • Bayan Lepas

On-site
MYR 120,000 - 180,000