Emulation Engineer - Palladium/ZeBu SoC Validation

UST; Penang; On-site; MYR 120,000 - 210,000; Full time

Job summary

UST in Penang, Malaysia is seeking an experienced Emulation Engineer to join our Silicon Design Verification team. The role focuses on hardware emulation, functional verification, and debugging within a complex SoC environment to accelerate pre-silicon validation and ensure high-quality silicon delivery.

Responsibilities include developing emulation-based verification strategies, defining test plans, building test content, and collaborating with RTL, verification, and software teams.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or related field.
• Minimum 4 years of experience in hardware emulation and verification.
• Hands-on experience with Palladium and/or ZeBu platforms.
• Experience in emulation-based functional verification with test content creation, test execution and debugging.
• Proficiency in Verilog HDL, SystemVerilog, Python, and Tcl.
• Basic understanding of AXI and on-chip interconnect architectures.

Responsibilities

• Develop and execute emulation-based verification strategies for complex SoC/IP designs.
• Define verification test plans and create comprehensive test content to validate design functionality.
• Build, compile, and maintain emulation models on Palladium and ZeBu platforms.
• Perform functional debugging using waveform analysis and root-cause investigation techniques.
• Collaborate with RTL designers, verification engineers, and software teams to identify and resolve design issues.
• Optimize emulation environments to improve performance, coverage, and validation efficiency.
• Develop and maintain automation scripts using Python and Tcl to streamline verification workflows.
• Support integration, bring-up, and execution of test suites on emulation platforms.
• Participate in design reviews and contribute to verification methodology improvements.

Skills

Emulation

Verilog HDL

SystemVerilog

Python

Tcl

PCIe protocol

AXI protocol

Waveform analysis

Debugging

Education

Bachelor's degree

Master's degree

Tools

Palladium

ZeBu

Cadence Palladium

Synopsys ZeBu

Job description

UST in Penang, Malaysia is seeking an experienced Emulation Engineer to join our Silicon Design Verification team. The role focuses on hardware emulation, functional verification, and debugging within a complex SoC environment to accelerate pre-silicon validation and ensure high-quality silicon delivery.

Responsibilities include developing emulation-based verification strategies, defining test plans, building test content, and collaborating with RTL, verification, and software teams.