E-Core CPU Design Manager (Hybrid) – Lead RTL to GDS

Intel Corporation; Seberang Perai; Hybrid; MYR 420,000 - 700,000; Full time

Job summary

Intel Corporation in Malaysia, Penang, is seeking a seasoned E-core CPU Design Manager to lead a high-performing team in the physical design of complex CPU blocks from RTL to tapeout. You will guide synthesis, APR, fine-tuning, and verification efforts to meet tight milestones.

The role requires a BS/MS in EE or CE with 10+ years of hands-on experience and at least 3 years in a leadership capacity. Familiarity with Synopsys or Cadence tools is essential.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering.
• Minimum 10 years hands-on experience in this area.
• At least 3 years of experience leading a team as technical lead or manager.
• Experience in block floor planning, RTL to gate level netlist generation through synthesis, DFT insertion, placement, clock tree synthesis and route flows, power and timing analysis and design rule checks.
• Led one or more design tape-outs of complex, high performance CPUs.

Responsibilities

• Manage a team of design engineers responsible for RTL to GDS activities.
• Plan, allocate resources, assign tasks and direct activities to meet aggressive schedules.
• Identify progress gating issues and implement corrective plans.
• Propose innovative methodologies to improve efficiency and quality of integration deliverables.
• Provide coaching and feedback on performance and career development.

Skills

Team leadership

RTL to GDS

Synthesis APR

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Synopsys tools

Cadence tools

Job description

Intel Corporation in Malaysia, Penang, is seeking a seasoned E-core CPU Design Manager to lead a high-performing team in the physical design of complex CPU blocks from RTL to tapeout. You will guide synthesis, APR, fine-tuning, and verification efforts to meet tight milestones.

The role requires a BS/MS in EE or CE with 10+ years of hands-on experience and at least 3 years in a leadership capacity. Familiarity with Synopsys or Cadence tools is essential.