E-Core CPU Physical Design Engineer — Timing & Power

Intel Corporation; George Town; Hybrid; MYR 190,000 - 234,000; Full time

Job summary

Intel Corporation in Penang, Malaysia is seeking an experienced hardware engineer to design CPU Core blocks, drive synthesis, place & route, and meet aggressive timing/power goals across RTL and circuit teams.

The role emphasizes strong analytic and problem solving skills, clear communication, and collaboration with micro-architecture, RTL and custom circuit teams to converge designs to targets, with a hybrid work model in place.

Qualifications

• Must have BS or MS in Electrical Engineering or Computer Engineering.
• 6+ years of CPU physical design and timing verification.
• Scripting with Tcl.
• Noise, cross-talk, OCV analysis.
• Floorplanning, physical design and timing closure.
• Formal equivalence, DRC/LVS, IR and electromigration checks.

Responsibilities

• Logic synthesis and place and route for CORE IP blocks.
• Performing floor-planning and routing studies and implementation Block/sub-system level timing analysis.
• Work on low power techniques and power reduction in sub-system.
• Physical verification closure of block/sub-system.
• Scripts writing for data analysis and recipe creation.
• Strong analytical ability, problem solving and communication skills.
• Ability to work independently and at various levels of abstraction.
• Strong communication and team work skills.
• Capable of working in a high performing team to deliver the results required by the organization.
• Ability to work well in a team and be productive under aggressive schedules.

Skills

CPU design

Synthesis & APR flows

Tcl scripting

Floorplanning

Timing analysis

Power optimization

Physical verification

Analytical thinking

Education

BS or MS in Electrical Engineering or Computer Engineering

Tools

Fusion Compiler

DCT

DCE

ICC2

RedHawk

ICV

Conformal

Calibre

PrimeTime

StarRCXT

Cadence Tools

Job description

Intel Corporation in Penang, Malaysia is seeking an experienced hardware engineer to design CPU Core blocks, drive synthesis, place & route, and meet aggressive timing/power goals across RTL and circuit teams.

The role emphasizes strong analytic and problem solving skills, clear communication, and collaboration with micro-architecture, RTL and custom circuit teams to converge designs to targets, with a hybrid work model in place.