E-Core CPU Physical Design Engineer | Hybrid Work

Intel Corporation

Penang

Hybrid

MYR 180,000 - 300,000

Full time

4 days ago
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Job summary

Intel Corporation in Malaysia, Penang, is seeking an experienced CPU physical design engineer to drive synthesis, floorplanning and timing closure. You will work with RTL and circuit teams to meet aggressive timing and power goals in a hybrid work setting.

The role requires strong analytic skills, good communication, and six years of CPU design experience using advanced P&R flows and verification tools. This position is part of a high-performance Intel team.

Qualifications

  • BS or MS in Electrical Engineering or Computer Engineering.
  • Minimum 6 years in CPU physical design and timing verification.
  • Synthesis/APR flows for multi voltage high frequency designs.
  • Tcl scripting.
  • Noise, cross-talk, IR and electro-migration checks.
  • Floorplanning and physical design and timing closure.
  • Formal equivalence, DRC/LVS, IR and electro-migration checks.

Responsibilities

  • Perform logic synthesis and place-and-route for CORE IP blocks.
  • Conduct floor-planning, routing studies and timing analysis.
  • Apply low-power techniques and power reduction in subsystems.
  • Support physical verification closure (DRC/LVS, DFM checks).
  • Write Tcl scripts for data analysis and recipe creation.
  • Collaborate with RTL, micro-architecture and circuit teams.

Skills

Logic synthesis
Place & route
Floorplanning
Timing closure
Tcl scripting
Noise analysis
Communication

Education

Electrical Engineering / Computer Engineering degree

Tools

Fusion Compiler
DCT
DCE
ICC2
RedHawk
ICV
Conformal
Calibre
PrimeTime
StarRCXT

Job description

Intel Corporation in Malaysia, Penang, is seeking an experienced CPU physical design engineer to drive synthesis, floorplanning and timing closure. You will work with RTL and circuit teams to meet aggressive timing and power goals in a hybrid work setting.

The role requires strong analytic skills, good communication, and six years of CPU design experience using advanced P&R flows and verification tools. This position is part of a high-performance Intel team.

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