The Package Electrical Team has an opening in the areas of signal integrity and power integrity. The candidate will work with package and IC designers to find ways to optimize the overall package design. The candidate’s responsibility is working with substrate designers to make sure all system level constraints are met prior to the package Tape-out. The candidate is expected to communicate with PHY owners to understand the Specs for various IPs such as PCIe, UFS, USB, MIPI, LPDDR, etc, and also with PCB designers to assess the impact of Ball assignment to the system level performance. This position offers the opportunity to work across multiple organizations such as PHY team, PCB team and PSIG and providing timely feedback and updating design guideline to the team is essential.
The responsibilities will include but not be limited to the following:
Minimum Qualifications:
Preferred Qualifications:
* The salary benchmark is based on the target salaries of market leaders in their relevant sectors. It is intended to serve as a guide to help Premium Members assess open positions and to help in salary negotiations. The salary benchmark is not provided directly by the company, which could be significantly higher or lower.