Timing & Methodology Engineer – 5nm SOC STA Expert

Qualcomm; Tijuana; Presencial; MXN 300.000 - 700.000; Jornada completa

Descripción de la vacante

Qualcomm is seeking a Timing Engineer to drive timing analysis across mobile, compute, automotive and IoT platforms. You will work with block/IP-level and system-level timing, supporting 5nm, 4nm and beyond process technologies.

You will partner with physical design, CAD and design-technology teams to develop flow scripts, validate timing sign-off, and ensure STA accuracy from RTL to GDS. Strong scripting in Python/Perl/TCL and C/C++ is beneficial for automation.

Formación

• BS in Science, Engineering or related field.
• Experience with timing analysis and STA methodologies.
• Familiarity with industry EDA tools and scripting.

Responsabilidades

• Perform timing analysis for SOC blocks and system-level timing closure across 5nm/4nm processes.
• Collaborate with physical design, CAD, IP teams to develop and validate timing flows.
• Conduct Spice simulations for PVT and ensure STA correlation with spice results.
• Develop timing ECOs, sign-off packages, and support complex SoC bring-up.

Conocimientos

Python

Perl

TCL

Unix shell

C/C++

ML modeling

Educación

Bachelor's degree in Science, Engineering, or related field

Herramientas

DC

DCT

DCG

Genus

Oasis

ICC2

Fusion

Innovus

Aprisa

RedHawk

SeaHawk

Voltus

Tempus

PT-SI

Descripción del empleo

Qualcomm is seeking a Timing Engineer to drive timing analysis across mobile, compute, automotive and IoT platforms. You will work with block/IP-level and system-level timing, supporting 5nm, 4nm and beyond process technologies.

You will partner with physical design, CAD and design-technology teams to develop flow scripts, validate timing sign-off, and ensure STA accuracy from RTL to GDS. Strong scripting in Python/Perl/TCL and C/C++ is beneficial for automation.