SoC Design & Integration Engineer - RTL, ASIC & Automation

Qualcomm

Tijuana

Presencial

MXN 600.000 - 900.000

Jornada completa

14 días+

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Descripción de la vacante

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking an ASIC engineer to contribute to RTL design, verification, and integration for sub‑5nm SoCs in mobile, AI, and XR spaces. You will work within a fast-paced team on architecture definitions, design trades, and IP integration.

The ideal candidate has strong analytical and communication skills, a track record in ASIC/FPGA design, and experience scripting for process automation to improve flows and tooling.

Formación

  • BS degree (MS preferred) in Electrical Engineering, Computer Science, or Computer Engineering
  • 2+ years of ASIC design, verification, validation, integration, or related work experience
  • PhD or MS requirements as applicable for advanced roles

Responsabilidades

  • Uses tools and applications to execute the architecture and design of SOC according to design protocol provided
  • Resolves architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
  • Executes design and verification strategies according to ASIC, SoC, and IP core specifications and in alignment with project lead
  • Participates in the design, analyses and reviews of IPs
  • Identifies areas for flow and process improvements through design techniques and automation
  • Feeds back silicon learnings to process team, design methodology, IP, and SoC design

Conocimientos

ASIC design
RTL design
Verification
Scripting
Architecture design
Communication skills

Educación

BS in Electrical Engineering/Computer Science/Computer Engineering
MS in Electrical Engineering/Computer Science/Computer Engineering
PhD in Science/Engineering

Herramientas

Verilog/VHDL
ModelSim
Python

Descripción del empleo

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking an ASIC engineer to contribute to RTL design, verification, and integration for sub‑5nm SoCs in mobile, AI, and XR spaces. You will work within a fast-paced team on architecture definitions, design trades, and IP integration.

The ideal candidate has strong analytical and communication skills, a track record in ASIC/FPGA design, and experience scripting for process automation to improve flows and tooling.

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