Physical Design Engineer: From Netlist to Tapeout

Micron Technology, Inc.

Tlaquepaque

Presencial

MXN 360.000 - 720.000

Jornada completa

14 días+
Generador de candidaturas

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Descripción de la vacante

Micron Technology, Inc. in Mexico is seeking an experienced engineer to drive semi-custom physical design from netlist to tapeout. You will develop floorplans, placement, routing, PDN, and constraints to ensure timing and reliability across complex semiconductor products.

The role requires a strong background in VLSI physical design, design verification tools, and collaboration with design, verification, and manufacturing teams to deliver high-quality results.

Formación

  • Bachelor's or Master's degree in Electrical Engineering or related field
  • Experience in VLSI physical design, semiconductor layout, or physical implementation
  • Knowledge of semicustom physical design flows, physical verification tools, and advanced technology node methodologies
  • Understanding of timing closure, PDN build, signal integrity, durability, and production feasibility concepts
  • Strong analytical, problem-solving, communication, and collaboration skills

Responsabilidades

  • Execute the semi-custom physical design flow from netlist handoff through physical verification and tapeout
  • Develop and maintain floorplans, placement, routing, power distribution networks (PDN), and physical design constraints
  • Perform DRC, LVS, parasitic extraction, and physical signoff activities
  • Analyze and resolve timing, signal integrity, electromigration, IR drop, reliability, and manufacturability issues
  • Partner with cross-functional teams to drive design closure, debug issues, and support tapeout readiness

Descripción del empleo

Micron Technology, Inc. in Mexico is seeking an experienced engineer to drive semi-custom physical design from netlist to tapeout. You will develop floorplans, placement, routing, PDN, and constraints to ensure timing and reliability across complex semiconductor products.

The role requires a strong background in VLSI physical design, design verification tools, and collaboration with design, verification, and manufacturing teams to deliver high-quality results.

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Paid family leave
Paid time-off program
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