Engineering Manager – Analog/Mixed-Signal Layout Lead

3050 Micron Semiconductor Mexico, S.de R.L. de C.V.; Jalisco; On-site; MXN 1,387,203 - 1,734,004; Full time

Job summary

3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking a seasoned leader in analog design with over 10 years of experience. The role involves leading a design team, overseeing layout verification activities, and ensuring on-time delivery of projects.

Qualified candidates will have extensive knowledge of analog layout fundamentals and hands-on experience with critical block layouts. Strong communication skills with global teams are essential. This is a significant opportunity to influence multiple projects across advanced CMOS processes.

Qualifications

• 10+ years of experience in analog/custom layout design in advanced CMOS processes.
• 2+ years of experience in managing layout teams and ensuring quality controls.
• Hands-on experience creating layouts of critical blocks.

Responsibilities

• Lead a team in the design and development of analog/mixed-signal circuits.
• Oversee layout verification activities and ensure on-time delivery.
• Communicate with global engineering teams for layout project success.

Skills

Analog/custom layout design

Team management

Quality control

Cadence VLE/VXL

Mentor Graphics Calibre DRC/LVS

Understanding of analog layout fundamentals

Education

Bachelor's or Master’s in Electronic/VLSI Engineering or related field

Tools

Cadence VLE/VXL

Mentor Graphics Calibre DRC/LVS

Job description

3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking a seasoned leader in analog design with over 10 years of experience. The role involves leading a design team, overseeing layout verification activities, and ensuring on-time delivery of projects.

Qualified candidates will have extensive knowledge of analog layout fundamentals and hands-on experience with critical block layouts. Strong communication skills with global teams are essential. This is a significant opportunity to influence multiple projects across advanced CMOS processes.